fernly: Remove GPL-2 files, move to libgcc
We used to use source files taken from U-Boot to allow for division and modular arithmetic. With the move to a BSD license, this is no longer acceptible. As a workaround, use a libgcc taken from a standard gcc distribution. Add the .a file, which has not been modified in any way. Signed-off-by: Sean Cross <xobs@kosagi.com>
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6 changed files with 18 additions and 265 deletions
5
Makefile
5
Makefile
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@ -6,7 +6,7 @@ CFLAGS = -march=armv5te -mfloat-abi=soft -Wall \
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AFLAGS =
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LDFLAGS = --nostdlib -T fernvale.ld
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LIBS =
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LIBS = lib/libgcc-armv5.a
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SRC_C = \
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bionic.c \
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@ -38,9 +38,6 @@ SRC_S = \
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scriptic/spi.S \
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scriptic/spi-blockmode.S \
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scriptic/keypad.S \
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_lshrdi3.S \
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_udivsi3.S \
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_divsi3.S \
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start.S
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OBJ = $(addprefix $(BUILD)/, $(SRC_S:.S=.o) $(SRC_C:.c=.o))
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17
README.md
17
README.md
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@ -92,6 +92,23 @@ That is, send the following packet:
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| 00 00 |
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Licensing
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---------
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Fernly is licensed under the BSD 2-clause license (see LICENSE).
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Previous versions of fernly linked against division libraries taken from U-Boot,
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which were licensed under GPL-2. These files have been removed.
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Instead, we supply a version of libgcc.a. This file was extracted from a
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standard gcc toolchain, specifically:
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https://code.google.com/p/yus-repo/downloads/detail?name=arm-none-eabi-4.6-armv5.tar.gz
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It has not been modified, and its distribution here should be covered under
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the "runtime exception".
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Memory Map
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----------
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142
_divsi3.S
142
_divsi3.S
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@ -1,142 +0,0 @@
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.macro ARM_DIV_BODY dividend, divisor, result, curbit
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#if __LINUX_ARM_ARCH__ >= 5
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clz \curbit, \divisor
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clz \result, \dividend
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sub \result, \curbit, \result
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mov \curbit, #1
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mov \divisor, \divisor, lsl \result
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mov \curbit, \curbit, lsl \result
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mov \result, #0
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#else
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@ Initially shift the divisor left 3 bits if possible,
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@ set curbit accordingly. This allows for curbit to be located
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@ at the left end of each 4 bit nibbles in the division loop
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@ to save one loop in most cases.
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tst \divisor, #0xe0000000
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moveq \divisor, \divisor, lsl #3
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moveq \curbit, #8
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movne \curbit, #1
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@ Unless the divisor is very big, shift it up in multiples of
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@ four bits, since this is the amount of unwinding in the main
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@ division loop. Continue shifting until the divisor is
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@ larger than the dividend.
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1: cmp \divisor, #0x10000000
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cmplo \divisor, \dividend
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movlo \divisor, \divisor, lsl #4
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movlo \curbit, \curbit, lsl #4
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blo 1b
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@ For very big divisors, we must shift it a bit at a time, or
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@ we will be in danger of overflowing.
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1: cmp \divisor, #0x80000000
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cmplo \divisor, \dividend
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movlo \divisor, \divisor, lsl #1
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movlo \curbit, \curbit, lsl #1
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blo 1b
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mov \result, #0
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#endif
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@ Division loop
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1: cmp \dividend, \divisor
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subhs \dividend, \dividend, \divisor
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orrhs \result, \result, \curbit
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cmp \dividend, \divisor, lsr #1
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subhs \dividend, \dividend, \divisor, lsr #1
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orrhs \result, \result, \curbit, lsr #1
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cmp \dividend, \divisor, lsr #2
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subhs \dividend, \dividend, \divisor, lsr #2
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orrhs \result, \result, \curbit, lsr #2
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cmp \dividend, \divisor, lsr #3
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subhs \dividend, \dividend, \divisor, lsr #3
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orrhs \result, \result, \curbit, lsr #3
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cmp \dividend, #0 @ Early termination?
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movnes \curbit, \curbit, lsr #4 @ No, any more bits to do?
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movne \divisor, \divisor, lsr #4
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bne 1b
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.endm
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.macro ARM_DIV2_ORDER divisor, order
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#if __LINUX_ARM_ARCH__ >= 5
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clz \order, \divisor
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rsb \order, \order, #31
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#else
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cmp \divisor, #(1 << 16)
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movhs \divisor, \divisor, lsr #16
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movhs \order, #16
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movlo \order, #0
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cmp \divisor, #(1 << 8)
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movhs \divisor, \divisor, lsr #8
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addhs \order, \order, #8
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cmp \divisor, #(1 << 4)
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movhs \divisor, \divisor, lsr #4
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addhs \order, \order, #4
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cmp \divisor, #(1 << 2)
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addhi \order, \order, #3
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addls \order, \order, \divisor, lsr #1
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#endif
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.endm
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.align 5
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.globl __divsi3
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.globl __aeabi_idiv
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__divsi3:
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__aeabi_idiv:
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cmp r1, #0
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eor ip, r0, r1 @ save the sign of the result.
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beq Ldiv0
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rsbmi r1, r1, #0 @ loops below use unsigned.
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subs r2, r1, #1 @ division by 1 or -1 ?
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beq 10f
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movs r3, r0
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rsbmi r3, r0, #0 @ positive dividend value
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cmp r3, r1
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bls 11f
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tst r1, r2 @ divisor is power of 2 ?
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beq 12f
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ARM_DIV_BODY r3, r1, r0, r2
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cmp ip, #0
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rsbmi r0, r0, #0
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mov pc, lr
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10: teq ip, r0 @ same sign ?
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rsbmi r0, r0, #0
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mov pc, lr
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11: movlo r0, #0
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moveq r0, ip, asr #31
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orreq r0, r0, #1
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mov pc, lr
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12: ARM_DIV2_ORDER r1, r2
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cmp ip, #0
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mov r0, r3, lsr r2
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rsbmi r0, r0, #0
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mov pc, lr
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Ldiv0:
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str lr, [sp, #-4]!
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bl __div0
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mov r0, #0 @ About as wrong as it could be.
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ldr pc, [sp], #4
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26
_lshrdi3.S
26
_lshrdi3.S
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@ -1,26 +0,0 @@
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/* Copyright 1995, 1996, 1998, 1999, 2000, 2003, 2004, 2005
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Free Software Foundation, Inc.
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* SPDX-License-Identifier: GPL-2.0+
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*/
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#ifdef __ARMEB__
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#define al r1
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#define ah r0
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#else
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#define al r0
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#define ah r1
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#endif
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.globl __lshrdi3
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.globl __aeabi_llsr
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__lshrdi3:
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__aeabi_llsr:
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subs r3, r2, #32
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rsb ip, r2, #32
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movmi al, al, lsr r2
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movpl al, ah, lsr r3
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orrmi al, al, ah, lsl ip
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mov ah, ah, lsr r2
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mov pc, lr
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93
_udivsi3.S
93
_udivsi3.S
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@ -1,93 +0,0 @@
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/* # 1 "libgcc1.S" */
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@ libgcc1 routines for ARM cpu.
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@ Division routines, written by Richard Earnshaw, (rearnsha@armltd.co.uk)
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dividend .req r0
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divisor .req r1
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result .req r2
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curbit .req r3
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/* ip .req r12 */
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/* sp .req r13 */
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/* lr .req r14 */
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/* pc .req r15 */
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.text
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.globl __udivsi3
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.type __udivsi3 ,function
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.globl __aeabi_uidiv
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.type __aeabi_uidiv ,function
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.align 0
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__udivsi3:
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__aeabi_uidiv:
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cmp divisor, #0
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beq Ldiv0
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mov curbit, #1
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mov result, #0
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cmp dividend, divisor
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bcc Lgot_result
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Loop1:
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@ Unless the divisor is very big, shift it up in multiples of
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@ four bits, since this is the amount of unwinding in the main
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@ division loop. Continue shifting until the divisor is
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@ larger than the dividend.
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cmp divisor, #0x10000000
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cmpcc divisor, dividend
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movcc divisor, divisor, lsl #4
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movcc curbit, curbit, lsl #4
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bcc Loop1
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Lbignum:
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@ For very big divisors, we must shift it a bit at a time, or
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@ we will be in danger of overflowing.
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cmp divisor, #0x80000000
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cmpcc divisor, dividend
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movcc divisor, divisor, lsl #1
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movcc curbit, curbit, lsl #1
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bcc Lbignum
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Loop3:
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@ Test for possible subtractions, and note which bits
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@ are done in the result. On the final pass, this may subtract
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@ too much from the dividend, but the result will be ok, since the
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@ "bit" will have been shifted out at the bottom.
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cmp dividend, divisor
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subcs dividend, dividend, divisor
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orrcs result, result, curbit
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cmp dividend, divisor, lsr #1
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subcs dividend, dividend, divisor, lsr #1
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orrcs result, result, curbit, lsr #1
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cmp dividend, divisor, lsr #2
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subcs dividend, dividend, divisor, lsr #2
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orrcs result, result, curbit, lsr #2
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cmp dividend, divisor, lsr #3
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subcs dividend, dividend, divisor, lsr #3
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orrcs result, result, curbit, lsr #3
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cmp dividend, #0 @ Early termination?
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movnes curbit, curbit, lsr #4 @ No, any more bits to do?
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movne divisor, divisor, lsr #4
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bne Loop3
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Lgot_result:
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mov r0, result
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mov pc, lr
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Ldiv0:
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str lr, [sp, #-4]!
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bl __div0 (PLT)
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mov r0, #0 @ about as wrong as it could be
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ldmia sp!, {pc}
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.size __udivsi3 , . - __udivsi3
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.globl __aeabi_uidivmod
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__aeabi_uidivmod:
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stmfd sp!, {r0, r1, ip, lr}
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bl __aeabi_uidiv
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ldmfd sp!, {r1, r2, ip, lr}
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mul r3, r0, r2
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sub r1, r1, r3
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mov pc, lr
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.globl __aeabi_idivmod
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__aeabi_idivmod:
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stmfd sp!, {r0, r1, ip, lr}
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bl __aeabi_idiv
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ldmfd sp!, {r1, r2, ip, lr}
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mul r3, r0, r2
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sub r1, r1, r3
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mov pc, lr
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BIN
lib/libgcc-armv5.a
Normal file
BIN
lib/libgcc-armv5.a
Normal file
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