143 lines
3.1 KiB
C
143 lines
3.1 KiB
C
#include <stdint.h>
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#include "serial.h"
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#define UART_IS_DLL 0x100
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#define UART_IS_LCR 0x200
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#define UART_RBR 0x00
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#define UART_THR 0x00
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#define UART_IER 0x04
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#define UART_IIR 0x08
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#define UART_FCR 0x08
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#define UART_LCR 0x0c
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#define UART_MCR 0x10
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#define UART_LSR 0x14
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#define UART_MSR 0x18
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#define UART_SCR 0x1c
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#define UART_SPEED 0x24
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/* The following are active when LCR[7] = 1 */
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#define UART_DLL 0x100
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#define UART_DLH 0x104
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/* The following are active when LCR = 0xbf */
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#define UART_EFR 0x208
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#define UART_XON1 0x210
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#define UART_XON2 0x214
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#define UART_XOFF1 0x218
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#define UART_XOFF2 0x21c
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#define UART_BASE 0xa0080000
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enum uart_baudrate {
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UART_38400,
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UART_57600,
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UART_115200,
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UART_230400,
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UART_460800,
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UART_614400,
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UART_921600,
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};
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#define UART_BAUD_RATE UART_115200
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#if 0
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/* 26MHz clock input (used when no PLL initialized directly after poweron) */
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static const uint16_t divider[] = {
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[UART_38400] = 42,
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[UART_57600] = 28,
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[UART_115200] = 14,
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[UART_230400] = 7,
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[UART_460800] = 14, /* would need UART_REG(HIGHSPEED) = 1 or 2 */
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[UART_921600] = 7, /* would need UART_REG(HIGHSPEED) = 2 */
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};
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#else
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/* 52MHz clock input (after PLL init) */
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static const uint16_t divider[] = {
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[UART_38400] = 85,
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[UART_57600] = 56,
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[UART_115200] = 28,
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[UART_230400] = 14,
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[UART_460800] = 7,
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[UART_921600] = 7, /* would need UART_REG(HIGHSPEED) = 1 */
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};
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#endif
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static uint8_t uart_getreg(int regnum)
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{
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volatile uint32_t *reg = (uint32_t *)(UART_BASE + (regnum & 0xff));
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return *reg;
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}
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static void uart_setreg(int regnum, uint8_t val)
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{
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uint8_t old_lcr;
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if (regnum & UART_IS_DLL)
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uart_setreg(UART_LCR, uart_getreg(UART_LCR) | 0x80);
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else if (regnum & UART_IS_LCR) {
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old_lcr = uart_getreg(UART_LCR);
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uart_setreg(UART_LCR, 0xbf);
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}
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volatile uint32_t *reg = (uint32_t *)(UART_BASE + (regnum & 0xff));
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*reg = val;
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if (regnum & UART_IS_DLL)
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uart_setreg(UART_LCR, uart_getreg(UART_LCR) & ~0x80);
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else if (regnum & UART_IS_LCR)
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uart_setreg(UART_LCR, old_lcr);
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}
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int serial_putc(uint8_t c)
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{
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/* Wait for UART to be empty */
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while (! (uart_getreg(UART_LSR) & 0x20));
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uart_setreg(UART_RBR, c);
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return 0;
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}
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uint8_t serial_getc(void)
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{
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while (! (uart_getreg(UART_LSR) & 0x01));
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return uart_getreg(UART_RBR);
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}
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int serial_puts(const void *s)
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{
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const char *str = s;
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while(*str) {
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if (*str == '\n')
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serial_putc('\r');
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serial_putc(*str++);
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}
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return 0;
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}
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void serial_init(void)
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{
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int tmp;
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// Setup 8-N-1,(UART_WLS_8 | UART_NONE_PARITY | UART_1_STOP) = 0x03
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uart_setreg(UART_LCR, 0x03);
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// Set BaudRate
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// config by UART_BAUD_RATE(9:115200)
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uart_setreg(UART_DLL, divider[UART_BAUD_RATE]&0xff);
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uart_setreg(UART_DLH, divider[UART_BAUD_RATE]>>8);
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uart_setreg(UART_LCR, 0x03);
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// Enable Fifo, and Rx Trigger level = 16bytes, flush Tx, Rx fifo
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// (UART_FCR_FIFOEN | UART_FCR_4Byte_Level | UART_FCR_RFR | UART_FCR_TFR) = 0x47
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uart_setreg(UART_FCR, 0x47);
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// DTR , RTS is on, data will be coming,Output2 is high
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uart_setreg(UART_MCR, 0x03);
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/* Set up normal interrupts */
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uart_setreg(UART_IER, 0x0d);
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/* Pause a while */
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for (tmp=0; tmp<0xff; tmp++);
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}
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