44 lines
1.3 KiB
Makefile
44 lines
1.3 KiB
Makefile
# This file expects that OBJ contains a list of all of the object files.
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# The directory portion of each object file is used to locate the source
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# and should not contain any ..'s but rather be relative to the top of the
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# tree.
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#
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# So for example, py/map.c would have an object file name py/map.o
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# The object files will go into the build directory and mantain the same
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# directory structure as the source tree. So the final dependency will look
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# like this:
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#
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# build/py/map.o: py/map.c
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#
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# We set vpath to point to the top of the tree so that the source files
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# can be located. By following this scheme, it allows a single build rule
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# to be used to compile all .c files.
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vpath %.S . $(TOP)
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$(BUILD)/%.o: %.S
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$(ECHO) "CC $<"
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$(Q)$(CC) $(CFLAGS) -c -o $@ $<
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vpath %.s . $(TOP)
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$(BUILD)/%.o: %.s
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$(ECHO) "AS $<"
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$(Q)$(AS) -o $@ $<
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define compile_c
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$(ECHO) "CC $<"
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$(Q)$(CC) $(CFLAGS) -c -MD -o $@ $<
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@# The following fixes the dependency file.
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@# See http://make.paulandlesley.org/autodep.html for details.
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@$(CP) $(@:.o=.d) $(@:.o=.P); \
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$(SED) -e 's/#.*//' -e 's/^[^:]*: *//' -e 's/ *\\$$//' \
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-e '/^$$/ d' -e 's/$$/ :/' < $(@:.o=.d) >> $(@:.o=.P); \
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$(RM) -f $(@:.o=.d)
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endef
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vpath %.c . $(TOP)
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$(BUILD)/%.o: %.c
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$(call compile_c)
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$(BUILD)/%.pp: %.c
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$(ECHO) "PreProcess $<"
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$(Q)$(CC) $(CFLAGS) -E -Wp,-C,-dD,-dI -o $@ $<
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