42 lines
1.2 KiB
ArmAsm
42 lines
1.2 KiB
ArmAsm
#include "scriptic.h"
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#include "fernvale-spi.h"
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/* Enable block mode for SPI CS0 */
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sc_new "spi_run", 1, 0, 0
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/* Wait for channel 2 to be idle */
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sc_write32 SPI_CTRL3_CHANNEL2_MASK, SPI_CTRL3_CHANNEL2_MASK, SPI_CTRL3
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sc_read32 SPI_CTRL3_CHANNEL2_IDLE, SPI_CTRL3_CHANNEL2_IDLE, SPI_CTRL3
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sc_read32 SPI_CTRL1_BUS_IDLE, SPI_CTRL1_BUS_IDLE, SPI_CTRL1
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/* Turn on block mode */
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sc_write32 SPI_BLOCKMODE_ENABLE, SPI_BLOCKMODE_ENABLE, SPI_BLOCKMODE
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/* Trigger the transfer */
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sc_write32 \
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SPI_BLOCKMODE_TRIGGER | SPI_BLOCKMODE_CS0, \
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SPI_BLOCKMODE_TRIGGER | SPI_BLOCKMODE_CS, \
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SPI_BLOCKMODE
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/* Wait for the device to prepare itself */
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sc_read32 SPI_BLOCKMODE_PREP, SPI_BLOCKMODE_PREP, SPI_BLOCKMODE
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/* Wait for it to finish */
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sc_read32 0, SPI_BLOCKMODE_BUSY, SPI_BLOCKMODE
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/* Stop the transfer */
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sc_write32 0, SPI_BLOCKMODE_TRIGGER | SPI_BLOCKMODE_CS, SPI_BLOCKMODE
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/* Wait for it to be disabled */
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sc_read32 0, SPI_BLOCKMODE_PREP, SPI_BLOCKMODE
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/* Exit block mode */
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sc_write32 0, SPI_BLOCKMODE_ENABLE, SPI_BLOCKMODE
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/* Wait for the chip to actually exit block mode */
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sc_read32 0, SPI_BLOCKMODE_ENABLE, SPI_BLOCKMODE
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/* Allow channel 2 to contain data */
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sc_write32 0, SPI_CTRL3_CHANNEL2_MASK, SPI_CTRL3
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sc_end
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