124 lines
2 KiB
ArmAsm
124 lines
2 KiB
ArmAsm
.section vectors
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.global reset
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reset:
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ldr r0, =0x7000cffc // stack_start
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mov sp, r0
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mov r2, #0xffffffff
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ldr r1, =0x7000c000 // stack_end
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clear_stack:
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cmp r1, r0
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str r2, [r0]
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sub r0, r0, #4
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bcc clear_stack
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## Copy 0x10000 bytes from =spi_offset to psram at 0x3460
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#copy_code_to_ram:
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# ldr r0, =0x00003460 // Target offset
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# ldr r1, =0x10003460 // Source offset
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# mov r2, #0x10000
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# bl asm_memcpy
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#
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## Copy reset vector table to address 0
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#copy_reset_vectors:
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# mov r0, #0
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# ldr r1, =0x3500
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# mov r2, #0x100
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# bl asm_memcpy
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# Begin executing out of psram
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# Jump to main, which ought to be in psram now
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jump_to_main:
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ldr r0, =reset_handler
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mov pc, r0
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asm_memcpy:
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mov r3, r1
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add r3, r3, r2
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asm_memcpy_loop:
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cmp r1, r3
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ldrcc r2, [r1], #4
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strcc r2, [r0], #4
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bcc asm_memcpy_loop
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bx lr
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uart_putc:
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ldr r2, =0xa0080014 // uart offset
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uart_putc_ready_wait:
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ldr r1, [r2]
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tst r1, #0x20
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beq uart_putc_ready_wait
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sub r2, r2, #0x14
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str r0, [r2]
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bx lr
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.global rv_start
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rv_start:
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ldr pc, .Lreset_handler
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ldr pc, .Lundef_handler
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ldr pc, .Lswi_handler
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ldr pc, .Lprefetch_abort_handler
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ldr pc, .Ldata_abort_handler
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ldr pc, .Lreserved_handler
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ldr pc, .Lirq_handler
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ldr pc, .Lfiq_handler
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.Lreset_handler:
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.long reset_handler
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.Lundef_handler:
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.long undef_handler
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.Lswi_handler:
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.long swi_handler
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.Lprefetch_abort_handler:
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.long prefetch_abort_handler
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.Ldata_abort_handler:
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.long data_abort_handler
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.Lreserved_handler:
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.long reserved_handler
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.Lirq_handler:
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.long irq_handler
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.Lfiq_handler:
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.long fiq_handler
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.global rv_end
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rv_end:
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.text
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.global __udiv64
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__udiv64:
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adds r0,r0,r0
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adc r1,r1,r1
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.rept 31
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cmp r1,r2
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subcs r1,r1,r2
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adcs r0,r0,r0
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adc r1,r1,r1
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.endr
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cmp r1,r2
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subcs r1,r1,r2
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adcs r0,r0,r0
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bx lr
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.global ram_memcpy
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ram_memcpy:
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ldr r0, =ram_memcpy_addr
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ldr r0, [r0]
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mov pc, r0
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ram_memcpy_addr:
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.long 0x70007388
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.global ram_bzero
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ram_bzero:
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ldr r0, =ram_bzero_addr
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ldr r0, [r0]
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mov pc, r0
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ram_bzero_addr:
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.long 0x700073bc
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