96 lines
4.1 KiB
C
96 lines
4.1 KiB
C
#ifndef __FV_EMI_H__
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#define __FV_EMI_H__
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/* Register names based off of:
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* https://github.com/dragonpt/lenovo_A390_mt6577_uboot_kernel/blob
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* /master/mediatek/custom
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* /huaqin77_cu_a510_ics2/preloader/inc/mt6577_emi_reg.h
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*/
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/* Note: MT6260 has only bank 1 */
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#define EMI_CTRL_ADDR 0xa0050000
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#define EMI_CTRL_CONA (EMI_CTRL_ADDR + 0x00) /* Bank 0 control (low) */
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#define EMI_CTRL_CONB (EMI_CTRL_ADDR + 0x08) /* Bank 1 control (low) */
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#define EMI_CTRL_CONC (EMI_CTRL_ADDR + 0x10) /* Bank 2 control (low) */
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#define EMI_CTRL_COND (EMI_CTRL_ADDR + 0x18) /* Bank 3 control (low) */
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#define EMI_CTRL_CONE (EMI_CTRL_ADDR + 0x20) /* Bank 0 control (high) */
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#define EMI_CTRL_CONF (EMI_CTRL_ADDR + 0x28) /* Bank 1 control (high) */
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#define EMI_CTRL_CONG (EMI_CTRL_ADDR + 0x30) /* Bank 2 control (high) */
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#define EMI_CTRL_CONH (EMI_CTRL_ADDR + 0x38) /* Bank 3 control (high) */
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#define EMI_CTRL_CONI (EMI_CTRL_ADDR + 0x40) /* Bank 0 control for mDDR */
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#define EMI_CTRL_CONJ (EMI_CTRL_ADDR + 0x48) /* Bank 1 control for mDDR */
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#define EMI_CTRL_CONK (EMI_CTRL_ADDR + 0x50) /* Bank 2 control for mDDR */
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#define EMI_CTRL_CONL (EMI_CTRL_ADDR + 0x58) /* Bank 3 control for mDDR */
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#define EMI_CTRL_CONM (EMI_CTRL_ADDR + 0x60) /* */
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#define EMI_CTRL_GENA (EMI_CTRL_ADDR + 0x70) /* General control register 0 */
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#define EMI_CTRL_GENB (EMI_CTRL_ADDR + 0x78) /* General control register 1 */
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#define EMI_CTRL_ADMUX (EMI_CTRL_ADDR + 0x80) /* Something involving GPIO mux */
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#define EMI_CTRL_RDCT (EMI_CTRL_ADDR + 0x88)
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#define EMI_CTRL_DLLV (EMI_CTRL_ADDR + 0x90)
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#define EMI_CTRL_IDLA (EMI_CTRL_ADDR + 0xc0)
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#define EMI_CTRL_IDLB (EMI_CTRL_ADDR + 0xc8)
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#define EMI_CTRL_IDLC (EMI_CTRL_ADDR + 0xd0)
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#define EMI_CTRL_IDLD (EMI_CTRL_ADDR + 0xd8)
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#define EMI_CTRL_IDLE (EMI_CTRL_ADDR + 0xe0)
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#define EMI_CTRL_ODLA (EMI_CTRL_ADDR + 0xe8)
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#define EMI_CTRL_ODLB (EMI_CTRL_ADDR + 0xf0)
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#define EMI_CTRL_ODLC (EMI_CTRL_ADDR + 0xf8)
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#define EMI_CTRL_ODLD (EMI_CTRL_ADDR + 0x100)
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#define EMI_CTRL_ODLE (EMI_CTRL_ADDR + 0x108)
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#define EMI_CTRL_ODLF (EMI_CTRL_ADDR + 0x110)
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#define EMI_CTRL_IOA (EMI_CTRL_ADDR + 0x130)
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#define EMI_CTRL_IOB (EMI_CTRL_ADDR + 0x138)
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#define EMI_CTRL_DSRAM (EMI_CTRL_ADDR + 0x150)
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#define EMI_CTRL_ARBA (EMI_CTRL_ADDR + 0x170)
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#define EMI_CTRL_ARBB (EMI_CTRL_ADDR + 0x178)
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#define EMI_CTRL_ARBC (EMI_CTRL_ADDR + 0x180)
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#define EMI_CTRL_SLCT (EMI_CTRL_ADDR + 0x198)
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#define EMI_CTRL_ABCT (EMI_CTRL_ADDR + 0x1a0)
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#define EMI_CTRL_BMEN (EMI_CTRL_ADDR + 0x200)
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#define EMI_CTRL_BCNT (EMI_CTRL_ADDR + 0x208)
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#define EMI_CTRL_TACT (EMI_CTRL_ADDR + 0x210)
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#define EMI_CTRL_TSCT (EMI_CTRL_ADDR + 0x218)
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#define EMI_CTRL_WACT (EMI_CTRL_ADDR + 0x220)
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#define EMI_CTRL_WSCT (EMI_CTRL_ADDR + 0x228)
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#define EMI_CTRL_BACT (EMI_CTRL_ADDR + 0x230)
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#define EMI_CTRL_BSCT0 (EMI_CTRL_ADDR + 0x238)
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#define EMI_CTRL_BSCT1 (EMI_CTRL_ADDR + 0x240)
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#define EMI_CTRL_TTYPE1 (EMI_CTRL_ADDR + 0x280)
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#define EMI_CTRL_TTYPE2 (EMI_CTRL_ADDR + 0x288)
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#define EMI_CTRL_TTYPE3 (EMI_CTRL_ADDR + 0x290)
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#define EMI_CTRL_TTYPE4 (EMI_CTRL_ADDR + 0x298)
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#define EMI_CTRL_TTYPE5 (EMI_CTRL_ADDR + 0x2a0)
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#define EMI_CTRL_TTYPE6 (EMI_CTRL_ADDR + 0x2a8)
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#define EMI_CTRL_TTYPE7 (EMI_CTRL_ADDR + 0x2b0)
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#define EMI_CTRL_TTYPE8 (EMI_CTRL_ADDR + 0x2b8)
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#define EMI_CTRL_TTYPE9 (EMI_CTRL_ADDR + 0x2c0)
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#define EMI_CTRL_TTYPE10 (EMI_CTRL_ADDR + 0x2c8)
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#define EMI_CTRL_TTYPE11 (EMI_CTRL_ADDR + 0x2d0)
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#define EMI_CTRL_TTYPE12 (EMI_CTRL_ADDR + 0x2d8)
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#define EMI_CTRL_TTYPE13 (EMI_CTRL_ADDR + 0x2e0)
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#define EMI_CTRL_TTYPE14 (EMI_CTRL_ADDR + 0x2e8)
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#define EMI_CTRL_TTYPE15 (EMI_CTRL_ADDR + 0x2f0)
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#define EMI_CTRL_TTYPE16 (EMI_CTRL_ADDR + 0x2f8)
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#define EMI_CTRL_MBISTA (EMI_CTRL_ADDR + 0x300)
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#define EMI_CTRL_MBISTA_PATTERN_SHIFT 16
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#define EMI_CTRL_MBISTA_PATTERN_MASK 0xffff0000
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#define EMI_CTRL_MBISTB (EMI_CTRL_ADDR + 0x308)
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#define EMI_CTRL_MBISTB_START_KEY 0x325
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#define EMI_CTRL_MBISTB_RANDOMIZE (1 << 12)
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#define EMI_CTRL_MBISTB_INVERT (1 << 13)
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#define EMI_CTRL_MBISTC (EMI_CTRL_ADDR + 0x310)
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#define EMI_CTRL_MBISTD (EMI_CTRL_ADDR + 0x318)
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#define EMI_CTRL_MBISTD_FAILURE (1 << 0)
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#define EMI_CTRL_MBISTD_FINISHED (1 << 1)
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#define EMI_CTRL_TEST (EMI_CTRL_ADDR + 0x330)
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#define EMI_CTRL_REMAP (0xA0510000)
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#endif /* __FV_EMI_H__ */
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