diff --git a/Ghidra/Framework/SoftwareModeling/src/main/java/ghidra/app/plugin/processors/sleigh/SleighLanguage.java b/Ghidra/Framework/SoftwareModeling/src/main/java/ghidra/app/plugin/processors/sleigh/SleighLanguage.java
index 3283f25aa0..5bca728f89 100644
--- a/Ghidra/Framework/SoftwareModeling/src/main/java/ghidra/app/plugin/processors/sleigh/SleighLanguage.java
+++ b/Ghidra/Framework/SoftwareModeling/src/main/java/ghidra/app/plugin/processors/sleigh/SleighLanguage.java
@@ -101,6 +101,13 @@ public class SleighLanguage implements Language {
 		initialize(description);
 	}
 
+	private void addAdditionInject(InjectPayloadSleigh payload) {
+		if (additionalInject == null) {
+			additionalInject = new ArrayList<>();
+		}
+		additionalInject.add(payload);
+	}
+
 	private void initialize(SleighLanguageDescription langDescription)
 			throws SAXException, IOException, UnknownInstructionException {
 		this.defaultSymbols = new ArrayList<>();
@@ -591,35 +598,32 @@ public class SleighLanguage implements Language {
 			}
 			InjectPayloadSleigh payload =
 				new InjectPayloadSleigh(subName, InjectPayload.EXECUTABLEPCODE_TYPE, source);
-			if (additionalInject == null) {
-				additionalInject = new ArrayList<>();
-			}
 			payload.restoreXml(parser);
-			additionalInject.add(payload);
+			addAdditionInject(payload);
 		}
 	}
 
-	private void parseSegmentOp(XmlElement el, XmlPullParser parser) {
+	public InjectPayloadSleigh parseSegmentOp(XmlElement el, XmlPullParser parser) {
 		String name = el.getAttribute("userop");
 		if (name == null) {
 			name = "segment";
 		}
 		name = name + "_pcode";
 		String source = "pspec: " + getLanguageID().getIdAsString();
+		InjectPayloadSleigh payload = null;
 		if (parser.peek().isStart()) {
 			if (parser.peek().getName().equals("pcode")) {
-				InjectPayloadSleigh payload =
-					new InjectPayloadSleigh(name, InjectPayload.EXECUTABLEPCODE_TYPE, source);
-				if (additionalInject == null) {
-					additionalInject = new ArrayList<>();
-				}
+				payload = new InjectPayloadSleigh(name, InjectPayload.EXECUTABLEPCODE_TYPE, source);
 				payload.restoreXml(parser);
-				additionalInject.add(payload);
 			}
 		}
 		while (parser.peek().isStart()) {
 			parser.discardSubTree();
 		}
+		if (payload == null) {
+			throw new SleighException("Missing <pcode> child for <segmentop> tag");
+		}
+		return payload;
 	}
 
 	private void read(XmlPullParser parser) {
@@ -798,7 +802,8 @@ public class SleighLanguage implements Language {
 				}
 			}
 			else if (element.getName().equals("segmentop")) {
-				parseSegmentOp(element, parser);
+				InjectPayloadSleigh payload = parseSegmentOp(element, parser);
+				addAdditionInject(payload);
 			}
 			// get rid of the end tag of whatever we started with at the top of the while
 			parser.end(element);
diff --git a/Ghidra/Framework/SoftwareModeling/src/main/java/ghidra/program/model/lang/BasicCompilerSpec.java b/Ghidra/Framework/SoftwareModeling/src/main/java/ghidra/program/model/lang/BasicCompilerSpec.java
index 3fca3dc8a9..06b5bcd60e 100644
--- a/Ghidra/Framework/SoftwareModeling/src/main/java/ghidra/program/model/lang/BasicCompilerSpec.java
+++ b/Ghidra/Framework/SoftwareModeling/src/main/java/ghidra/program/model/lang/BasicCompilerSpec.java
@@ -482,6 +482,12 @@ public class BasicCompilerSpec implements CompilerSpec {
 				evalCurrentPrototype = parser.start().getAttribute("name");
 				parser.end();
 			}
+			else if (name.equals("segmentop")) {
+				XmlElement el = parser.start();
+				InjectPayloadSleigh payload = language.parseSegmentOp(el, parser);
+				parser.end();
+				pcodeInject.registerInject(payload);
+			}
 			else {
 				XmlElement el = parser.start();
 				parser.discardSubTree(el);
diff --git a/Ghidra/Processors/Z80/data/languages/z80.cspec b/Ghidra/Processors/Z80/data/languages/z80.cspec
index 37ed6684c8..9a4e34c425 100644
--- a/Ghidra/Processors/Z80/data/languages/z80.cspec
+++ b/Ghidra/Processors/Z80/data/languages/z80.cspec
@@ -9,10 +9,15 @@
     <range space="io"/>
   </global>
   <stackpointer register="SP" space="ram"/>
-  <segmentop space="ram" userop="segment" baseinsize="2" innerinsize="2" farpointer="yes">
-    <baseop code="INT_ZEXT"/>
-    <baseop code="INT_LEFT" value="12"/>
-    <innerop code="INT_ZEXT"/>
+  <segmentop space="ram" userop="segment" farpointer="yes">
+    <pcode>
+      <input name="inner" size="2"/>
+      <input name="base" size="2"/>
+      <output name="res" size="2"/>
+      <body><![CDATA[
+        res = (base << 12) + inner;
+      ]]></body>
+    </pcode>
     <constresolve>
       <register name="rBBR"/>
     </constresolve>
diff --git a/Ghidra/Processors/x86/certification.manifest b/Ghidra/Processors/x86/certification.manifest
index 3d21aaea4a..023526417c 100644
--- a/Ghidra/Processors/x86/certification.manifest
+++ b/Ghidra/Processors/x86/certification.manifest
@@ -35,8 +35,6 @@ data/languages/x86-64-win.cspec||GHIDRA||||END|
 data/languages/x86-64.dwarf||GHIDRA||||END|
 data/languages/x86-64.pspec||GHIDRA||||END|
 data/languages/x86-64.slaspec||GHIDRA||||END|
-data/languages/x86-smm.cspec||GHIDRA||||END|
-data/languages/x86-smm.pspec||GHIDRA||||END|
 data/languages/x86.dwarf||GHIDRA||||END|
 data/languages/x86.ldefs||GHIDRA||||END|
 data/languages/x86.opinion||GHIDRA||||END|
diff --git a/Ghidra/Processors/x86/data/languages/x86-smm.cspec b/Ghidra/Processors/x86/data/languages/x86-smm.cspec
deleted file mode 100644
index 077b5c60e0..0000000000
--- a/Ghidra/Processors/x86/data/languages/x86-smm.cspec
+++ /dev/null
@@ -1,108 +0,0 @@
-<?xml version="1.0" encoding="UTF-8"?>
-
-<compiler_spec>
-  <global>
-    <range space="ram"/>
-  </global>
-  <stackpointer register="SP" space="ram"/>
-  <segmentop space="ram"
-             userop="segment"
-             baseinsize="2"
-             innerinsize="2"
-             farpointer="yes"
-             force="false">
-    <baseop code="INT_ZEXT"/>
-    <baseop code="INT_LEFT" value="16"/>
-    <innerop code="INT_ZEXT"/>
-  </segmentop>
-  <default_proto>
-    <prototype name="__stdcall16near" extrapop="unknown" stackshift="2">
-      <input>
-        <pentry minsize="1" maxsize="500" align="2">
-          <addr offset="2" space="stack"/>
-        </pentry>
-      </input>
-      <output>
-        <pentry minsize="1" maxsize="2">
-          <register name="AX"/>
-        </pentry>
-      </output>
-      <unaffected>
-        <register name="SP"/>
-        <register name="BP"/>
-        <register name="SI"/>
-        <register name="DI"/>
-        <register name="DS"/>
-        <register name="CS"/>
-        <register name="ES"/>
-        <register name="SS"/>
-      </unaffected>
-    </prototype>
-  </default_proto>
-  <prototype name="__cdecl16near" extrapop="2" stackshift="2">
-    <input>
-      <pentry minsize="1" maxsize="500" align="2">
-        <addr offset="2" space="stack"/>
-      </pentry>
-    </input>
-    <output>
-      <pentry minsize="1" maxsize="2">
-        <register name="AX"/>
-      </pentry>
-    </output>
-    <unaffected>
-      <register name="SP"/>
-      <register name="BP"/>
-      <register name="SI"/>
-      <register name="DI"/>
-      <register name="DS"/>
-      <register name="CS"/>
-      <register name="ES"/>
-      <register name="SS"/>
-    </unaffected>
-  </prototype>
-  <prototype name="__stdcall16far" extrapop="unknown" stackshift="2">
-    <input>
-      <pentry minsize="1" maxsize="500" align="2">
-        <addr offset="4" space="stack"/>
-      </pentry>
-    </input>
-    <output>
-      <pentry minsize="1" maxsize="2">
-        <register name="AX"/>
-      </pentry>
-    </output>
-    <unaffected>
-      <register name="SP"/>
-      <register name="BP"/>
-      <register name="SI"/>
-      <register name="DI"/>
-      <register name="DS"/>
-      <register name="CS"/>
-      <register name="ES"/>
-      <register name="SS"/>
-    </unaffected>
-  </prototype>
-  <prototype name="__cdecl16far" extrapop="4" stackshift="2">
-    <input>
-      <pentry minsize="1" maxsize="500" align="2">
-        <addr offset="4" space="stack"/>
-      </pentry>
-    </input>
-    <output>
-      <pentry minsize="1" maxsize="2">
-        <register name="AX"/>
-      </pentry>
-    </output>
-    <unaffected>
-      <register name="SP"/>
-      <register name="BP"/>
-      <register name="SI"/>
-      <register name="DI"/>
-      <register name="DS"/>
-      <register name="CS"/>
-      <register name="ES"/>
-      <register name="SS"/>
-    </unaffected>
-  </prototype>
-</compiler_spec>
diff --git a/Ghidra/Processors/x86/data/languages/x86-smm.pspec b/Ghidra/Processors/x86/data/languages/x86-smm.pspec
deleted file mode 100644
index 9a09f7566f..0000000000
--- a/Ghidra/Processors/x86/data/languages/x86-smm.pspec
+++ /dev/null
@@ -1,13 +0,0 @@
-<?xml version="1.0" encoding="UTF-8"?>
-
-<processor_spec>
-  <properties>
-    <property key="useOperandReferenceAnalyzerSwitchTables" value="true"/>
-  </properties>
-  <context_data>
-    <context_set space="ram">
-      <set name="addrsize" val="0"/>
-      <set name="opsize" val="0"/>
-    </context_set>
-  </context_data>
-</processor_spec>
diff --git a/Ghidra/Processors/x86/data/languages/x86.ldefs b/Ghidra/Processors/x86/data/languages/x86.ldefs
index 20f59a3a62..70362290d8 100644
--- a/Ghidra/Processors/x86/data/languages/x86.ldefs
+++ b/Ghidra/Processors/x86/data/languages/x86.ldefs
@@ -34,11 +34,11 @@
             variant="System Management Mode"
             version="2.8"
             slafile="x86.sla"
-            processorspec="x86-smm.pspec"
+            processorspec="x86-16.pspec"
             manualindexfile="../manuals/x86.idx"
             id="x86:LE:32:System Management Mode">
     <description>Intel/AMD 32-bit x86 System Management Mode</description>
-    <compiler name="default" spec="x86-smm.cspec" id="default"/>
+    <compiler name="default" spec="x86-16.cspec" id="default"/>
     <external_name tool="DWARF.register.mapping.file" name="x86.dwarf"/>
   </language>
   <language processor="x86"
diff --git a/GhidraBuild/Skeleton/data/languages/skel.cspec b/GhidraBuild/Skeleton/data/languages/skel.cspec
index 29393df996..764e2ba184 100644
--- a/GhidraBuild/Skeleton/data/languages/skel.cspec
+++ b/GhidraBuild/Skeleton/data/languages/skel.cspec
@@ -11,14 +11,6 @@
     <range space="io"/>
   </global>
   <stackpointer register="SP" space="ram"/>
-  <segmentop space="ram" userop="segment" baseinsize="2" innerinsize="2" farpointer="yes">
-    <baseop code="INT_ZEXT"/>
-    <baseop code="INT_LEFT" value="12"/>
-    <innerop code="INT_ZEXT"/>
-    <constresolve>
-      <register name="rBBR"/>
-    </constresolve>
-  </segmentop>
   <default_proto>
     <prototype name="__asmA" extrapop="2" stackshift="2" strategy="register">
       <input>