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Merge remote-tracking branch
'origin/GP-5593_ghidorahrex_PR-7985_niooss-ledger_ebpf-fix-semantic-byte-swap-instructions' into patch (Closes #7985)
This commit is contained in:
Ryan Kurtz
commit
179263a592
6 changed files with 84 additions and 26 deletions
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@ -7,4 +7,5 @@ data/languages/eBPF.ldefs||GHIDRA||||END|
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data/languages/eBPF.opinion||GHIDRA||||END|
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data/languages/eBPF.pspec||GHIDRA||||END|
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data/languages/eBPF.sinc||GHIDRA||||END|
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data/languages/eBPF_be.slaspec||GHIDRA||||END|
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data/languages/eBPF_le.slaspec||GHIDRA||||END|
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@ -1,5 +1,17 @@
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<?xml version="1.0" encoding="UTF-8"?>
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<language_definitions>
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<language processor="eBPF"
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endian="big"
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size="64"
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variant="default"
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version="1.0"
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slafile="eBPF_be.sla"
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processorspec="eBPF.pspec"
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id="eBPF:BE:64:default">
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<description>eBPF processor 64-bit big-endian</description>
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<compiler name="default" spec="eBPF.cspec" id="default"/>
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<external_name tool="DWARF.register.mapping.file" name="eBPF.dwarf"/>
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</language>
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<language processor="eBPF"
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endian="little"
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size="64"
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@ -10,6 +22,6 @@
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id="eBPF:LE:64:default">
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<description>eBPF processor 64-bit little-endian</description>
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<compiler name="default" spec="eBPF.cspec" id="default"/>
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<external_name tool="DWARF.register.mapping.file" name="eBPF.dwarf"/>
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<external_name tool="DWARF.register.mapping.file" name="eBPF.dwarf"/>
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</language>
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</language_definitions>
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@ -1,5 +1,6 @@
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<opinions>
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<constraint loader="Executable and Linking Format (ELF)" compilerSpecID="default">
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<constraint primary="247" processor="eBPF" endian="big" size="64" />
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<constraint primary="247" processor="eBPF" endian="little" size="64" />
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</constraint>
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</opinions>
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@ -2,6 +2,8 @@
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# eBPF Processor Specification for Ghidra
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###############################################################################
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define endian=$(ENDIAN);
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#eBPF is a RISC register machine with a total of 11 64-bit registers, a program counter and a 512 byte fixed-size stack.
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#9 registers are general purpose read-write, one is a read-only stack pointer and the program counter is implicit,
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#i.e. we can only jump to a certain offset from it. The eBPF registers are always 64-bit wide.
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@ -13,6 +15,7 @@ define space syscall type=ram_space size=4;
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define register offset=0 size=8 [ R0 R1 R2 R3 R4 R5 R6 R7 R8 R9 R10 PC ];
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# Instruction encoding: Insop:8, dst_reg:4, src_reg:4, off:16, imm:32 - from lsb to msb
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@if ENDIAN == "little"
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define token instr(64)
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imm=(32, 63) signed
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off=(16, 31) signed
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@ -29,6 +32,23 @@ define token instr(64)
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define token immtoken(64)
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imm2=(32, 63)
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;
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@else # ENDIAN == "big"
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define token instr(64)
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imm=(0, 31) signed
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off=(32, 47) signed
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src=(48, 51)
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dst=(52, 55)
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op_insn_class=(56, 58)
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op_ld_st_size=(59, 60)
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op_ld_st_mode=(61, 63)
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op_alu_jmp_source=(59, 59)
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op_alu_jmp_opcode=(60, 63)
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;
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define token immtoken(64)
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imm2=(0, 31)
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;
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@endif # ENDIAN = "big"
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#To operate with registers
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attach variables [ src dst ] [ R0 R1 R2 R3 R4 R5 R6 R7 R8 R9 R10 _ _ _ _ _ ];
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@ -104,33 +124,54 @@ DST4: dst is dst { local tmp:4 = dst:4; export tmp; }
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#Bytewasp instructions
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###############################################################################
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@if ENDIAN == "little"
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# BPF_ALU | BPF_K | BPF_END
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:LE16 dst is imm=0x10 & dst & op_alu_jmp_opcode=0xd & op_alu_jmp_source=0 & op_insn_class=0x4 { dst=((dst) >> 8) | ((dst) << 8); }
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:LE32 dst is imm=0x20 & dst & op_alu_jmp_opcode=0xd & op_alu_jmp_source=0 & op_insn_class=0x4 { dst=((dst) >> 24) | (((dst) & 0x00FF0000) >> 8) | (((dst) & 0x0000FF00) << 8) | ((dst) << 24); }
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:LE16 dst is imm=0x10 & dst & op_alu_jmp_opcode=0xd & op_alu_jmp_source=0 & op_insn_class=0x4 { dst = zext(dst:2); }
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:LE32 dst is imm=0x20 & dst & op_alu_jmp_opcode=0xd & op_alu_jmp_source=0 & op_insn_class=0x4 { dst = zext(dst:4); }
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:LE64 dst is imm=0x40 & dst & op_alu_jmp_opcode=0xd & op_alu_jmp_source=0 & op_insn_class=0x4 {}
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# BPF_ALU | BPF_X | BPF_END
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:BE16 dst is imm=0x10 & dst & op_alu_jmp_opcode=0xd & op_alu_jmp_source=1 & op_insn_class=0x4 {
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dst = ((dst & 0xff00) >> 8) | ((dst & 0x00ff) << 8);
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}
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:BE32 dst is imm=0x20 & dst & op_alu_jmp_opcode=0xd & op_alu_jmp_source=1 & op_insn_class=0x4 {
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dst = ((dst & 0xff000000) >> 24) | (((dst) & 0x00ff0000) >> 8) | (((dst) & 0x0000ff00) << 8) | ((dst & 0x000000ff) << 24);
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}
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:BE64 dst is imm=0x40 & dst & op_alu_jmp_opcode=0xd & op_alu_jmp_source=1 & op_insn_class=0x4 {
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dst = ((dst << 56) & 0xff00000000000000) |
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((dst << 40) & 0x00ff000000000000) |
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((dst << 24) & 0x0000ff0000000000) |
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((dst << 8) & 0x000000ff00000000) |
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((dst >> 8) & 0x00000000ff000000) |
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((dst >> 24) & 0x0000000000ff0000) |
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((dst >> 40) & 0x000000000000ff00) |
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((dst >> 56) & 0x00000000000000ff);
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}
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@else # ENDIAN == "big"
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# BPF_ALU | BPF_K | BPF_END
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:LE16 dst is imm=0x10 & dst & op_alu_jmp_opcode=0xd & op_alu_jmp_source=0 & op_insn_class=0x4 {
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dst = ((dst & 0xff00) >> 8) | ((dst & 0x00ff) << 8);
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}
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:LE32 dst is imm=0x20 & dst & op_alu_jmp_opcode=0xd & op_alu_jmp_source=0 & op_insn_class=0x4 {
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dst = ((dst & 0xff000000) >> 24) | (((dst) & 0x00ff0000) >> 8) | (((dst) & 0x0000ff00) << 8) | ((dst & 0x000000ff) << 24);
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}
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:LE64 dst is imm=0x40 & dst & op_alu_jmp_opcode=0xd & op_alu_jmp_source=0 & op_insn_class=0x4 {
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dst=( (dst << 56) & 0xff00000000000000 ) |
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( (dst << 40) & 0x00ff000000000000 ) |
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( (dst << 24) & 0x0000ff0000000000 ) |
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( (dst << 8) & 0x000000ff00000000 ) |
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( (dst >> 8) & 0x00000000ff000000 ) |
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( (dst >> 24) & 0x0000000000ff0000 ) |
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( (dst >> 40) & 0x000000000000ff00 ) |
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( (dst >> 56) & 0x00000000000000ff );
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dst = ((dst << 56) & 0xff00000000000000) |
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((dst << 40) & 0x00ff000000000000) |
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((dst << 24) & 0x0000ff0000000000) |
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((dst << 8) & 0x000000ff00000000) |
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((dst >> 8) & 0x00000000ff000000) |
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((dst >> 24) & 0x0000000000ff0000) |
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((dst >> 40) & 0x000000000000ff00) |
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((dst >> 56) & 0x00000000000000ff);
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}
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# BPF_ALU | BPF_X | BPF_END
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:BE16 dst is imm=0x10 & dst & op_alu_jmp_opcode=0xd & op_alu_jmp_source=1 & op_insn_class=0x4 { dst=((dst) >> 8) | ((dst) << 8); }
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:BE32 dst is imm=0x20 & dst & op_alu_jmp_opcode=0xd & op_alu_jmp_source=1 & op_insn_class=0x4 { dst=((dst) >> 24) | (((dst) & 0x00FF0000) >> 8) | (((dst) & 0x0000FF00) << 8) | ((dst) << 24); }
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:BE64 dst is imm=0x40 & dst & op_alu_jmp_opcode=0xd & op_alu_jmp_source=1 & op_insn_class=0x4 {
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dst=( (dst << 56) & 0xff00000000000000 ) |
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( (dst << 40) & 0x00ff000000000000 ) |
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( (dst << 24) & 0x0000ff0000000000 ) |
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( (dst << 8) & 0x000000ff00000000 ) |
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( (dst >> 8) & 0x00000000ff000000 ) |
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( (dst >> 24) & 0x0000000000ff0000 ) |
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( (dst >> 40) & 0x000000000000ff00 ) |
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( (dst >> 56) & 0x00000000000000ff );
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}
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:BE16 dst is imm=0x10 & dst & op_alu_jmp_opcode=0xd & op_alu_jmp_source=1 & op_insn_class=0x4 { dst = zext(dst:2); }
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:BE32 dst is imm=0x20 & dst & op_alu_jmp_opcode=0xd & op_alu_jmp_source=1 & op_insn_class=0x4 { dst = zext(dst:4); }
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:BE64 dst is imm=0x40 & dst & op_alu_jmp_opcode=0xd & op_alu_jmp_source=1 & op_insn_class=0x4 {}
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@endif # ENDIAN = "big"
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#Memory instructions - Load and Store
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###############################################################################
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3
Ghidra/Processors/eBPF/data/languages/eBPF_be.slaspec
Normal file
3
Ghidra/Processors/eBPF/data/languages/eBPF_be.slaspec
Normal file
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@ -0,0 +1,3 @@
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@define ENDIAN "big"
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@include "eBPF.sinc"
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@ -1,3 +1,3 @@
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define endian=little;
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@define ENDIAN "little"
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@include "eBPF.sinc"
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