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Merge remote-tracking branch 'origin/GP-2878_emteere_riscv_patterns--SQUASHED' into patch
This commit is contained in:
Ryan Kurtz
commit
1c3d0f9f74
7 changed files with 100 additions and 81 deletions
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@ -709,7 +709,10 @@ define token instr (32)
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op2030=(20,30)
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op2031=(20,31)
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sop2031=(20,31) signed
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op2121=(21,21)
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op2130=(21,30)
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op2222=(22,22)
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op2323=(23,23)
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op2324=(23,24)
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op2424=(24,24)
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op2427=(24,27)
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@ -753,8 +756,10 @@ define token cinstr (16)
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cr0206=(2,6)
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cfr0206=(2,6)
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cop0212=(2,12)
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cop0303=(3,3)
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cop0304=(3,4)
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cop0305=(3,5)
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cop0404=(4,4)
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cop0406=(4,6)
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cop0505=(5,5)
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cop0506=(5,6)
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@ -773,6 +778,7 @@ define token cinstr (16)
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cfr0711=(7,11)
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cop0712=(7,12)
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cop0808=(8,8)
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cop0909=(9,9)
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cop0910=(9,10)
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cop0912=(9,12)
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cop1010=(10,10)
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@ -123,11 +123,18 @@
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}
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# jal d,a 0000006f 0000007f JSR (0, 0)
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# call if RA set, destreg == RA
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:jal ra,immUJ is immUJ & ra & r0711=1 & op0001=0x3 & op0204=0x3 & op0506=0x3
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{
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ra = inst_next;
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call immUJ;
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}
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# goto if RA not set, destreg != RA
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:jal rd,immUJ is immUJ & rd & op0001=0x3 & op0204=0x3 & op0506=0x3
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{
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#TODO RAS: push inst_next if rd=x1/x5
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rd = inst_next;
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call immUJ;
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goto immUJ;
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}
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# j a 0000006f 00000fff BRANCH|ALIAS (0, 0)
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@ -136,14 +143,21 @@
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goto immUJ;
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}
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# jalr d,s,j 00000067 0000707f JSR (0, 0)
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# call if RA set, destreg == RA
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:jalr ra,rs1,immI is rs1 & immI & ra & r0711=1 & op0001=0x3 & op0204=0x1 & op0506=0x3 & funct3=0x0
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{
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local ea:$(XLEN) = (rs1 + immI) & ~1;
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ra = inst_next;
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call [ea];
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}
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# goto if RA not set, destreg != RA
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:jalr rd,rs1,immI is rs1 & immI & rd & op0001=0x3 & op0204=0x1 & op0506=0x3 & funct3=0x0
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{
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#TODO RAS: push inst_next/pop based on rd=x1/x5 or rs1=x1/x5
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local ea:$(XLEN) = (rs1 + immI) & ~1;
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rd = inst_next;
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call [ea];
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goto [ea];
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}
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# jr o(s) 00000067 00007fff BRANCH|ALIAS (0, 0)
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@ -355,11 +355,13 @@
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*[ram]:4 ea = crs2:4;
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}
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# c.unimp 00000000 0000ffff SIMPLE (0, 0)
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:c.unimp is cop0001=0x0 & cop1315=0x0 & cop0212=0x0
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{
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trap();
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}
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# c.unimp 00000000 0000ffff SIMPLE (0, 0)
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# would be better not to decode as it is used as padding
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#
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# :c.unimp is cop0001=0x0 & cop1315=0x0 & cop0212=0x0
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#{
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# trap();
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#}
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# c.xor Cs,Ct 00008c21 0000fc63 SIMPLE (0, 0)
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:c.xor cr0709s,cr0204s is cr0204s & cr0709s & cop0001=0x1 & cop1315=0x4 & cop0506=0x1 & cop1012=0x3
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@ -203,21 +203,25 @@ cbimm: reloc is scop1212 & cop1011 & cop0506 & cop0304 & cop0202 [ reloc = inst_
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# used for goto
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cjimm: reloc is scop1212 & cop1111 & cop0910 & cop0808 & cop0707 & cop0606 & cop0305 & cop0202 [ reloc = inst_start + ((scop1212 << 11) | (cop1111 << 4) | (cop0910 << 8) | (cop0808 << 10) | (cop0707 << 6) | (cop0606 << 7) | (cop0305 << 1) | (cop0202 << 5)); ] { export *[ram]:$(XLEN) reloc; }
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nzuimm5: is cop0606=1 | cop0505=1 | cop0404=1 | cop0303 = 1 | cop0202=1 {}
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nzuimm6: is cop1212=1 | cop0606=1 | cop0505=1 | cop0404=1 | cop0303 = 1 | cop0202=1 {}
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@if ADDRSIZE == "32"
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#TODO nonzero, would like to have cop0205>0
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c6imm: uimm is cop1212=0 & cop0206 [ uimm = (cop0206 + 0); ] { local tmp:$(XLEN) = uimm; export tmp; }
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c6imm: uimm is cop1212=0 & cop0206 & nzuimm5 [ uimm = (cop0206 + 0); ] { local tmp:$(XLEN) = uimm; export tmp; }
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@elif ADDRSIZE == "64"
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#TODO nonzero, would like to have cop0205>0 | cop0206>0
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c6imm: uimm is cop1212 & cop0206 [ uimm = (cop1212 << 5) | (cop0206); ] { local tmp:$(XLEN) = uimm; export tmp; }
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c6imm: uimm is cop1212 & cop0206 & nzuimm6 [ uimm = (cop1212 << 5) | (cop0206); ] { local tmp:$(XLEN) = uimm; export tmp; }
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@elif ADDRSIZE == "128"
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c6imm: uimm is cop1212 & cop0206 [ uimm = (cop1212 << 5) | (cop0206); ] { local tmp:$(XLEN) = uimm + (64 * (uimm == 0)); export tmp; }
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@endif
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cbigimm: uimm is cop1212 & scop1212 & cop0206 [ uimm = (cop1212 << 5) | (cop0206); ] { local tmp:$(XLEN) = (scop1212 << 17) | (cop0206 << 12); export tmp; }
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cbigimm: uimm is cop1212 & scop1212 & cop0206 & nzuimm6 [ uimm = (cop1212 << 5) | (cop0206); ] { local tmp:$(XLEN) = (scop1212 << 17) | (cop0206 << 12); export tmp; }
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caddi4spnimm: uimm is cop1112 & cop0710 & cop0606 & cop0505 [ uimm = (cop0710 << 6) | (cop1112 << 4) | (cop0505 << 3) | (cop0606 << 2); ] { local tmp:$(XLEN) = uimm; export tmp; }
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nzcaddi4: is cop1212=1 | cop1111=1 | cop1010=1 | cop0909=1 | cop0808=1 | cop0707=1 | cop0606=1 | cop0505=1 {}
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caddi16spimm: imm is scop1212 & cop0606 & cop0505 & cop0304 & cop0202 [ imm = (scop1212 << 9) | (cop0304 << 7) | (cop0505 << 6) | (cop0202 << 5) | (cop0606 << 4); ] { local tmp:$(XLEN) = imm; export tmp; }
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caddi4spnimm: uimm is nzcaddi4 & cop1112 & cop0710 & cop0606 & cop0505 [ uimm = (cop0710 << 6) | (cop1112 << 4) | (cop0505 << 3) | (cop0606 << 2); ] { local tmp:$(XLEN) = uimm; export tmp; }
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caddi16spimm: imm is scop1212 & cop0606 & cop0505 & cop0304 & cop0202 & nzuimm6 [ imm = (scop1212 << 9) | (cop0304 << 7) | (cop0505 << 6) | (cop0202 << 5) | (cop0606 << 4); ] { local tmp:$(XLEN) = imm; export tmp; }
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clwimm: uimm is cop1012 & cop0606 & cop0505 [ uimm = (cop1012 << 3) | (cop0606 << 2) | (cop0505 << 6); ] { local tmp:$(XLEN) = uimm; export tmp; }
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@ -69,20 +69,20 @@
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</output>
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<unaffected>
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<register name="sp"/>
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<register name="gp"/>
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<register name="tp"/>
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<register name="gp"/>
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<register name="tp"/>
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<register name="s0"/>
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<register name="s1"/>
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<register name="s2"/>
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<register name="s3"/>
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<register name="s4"/>
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<register name="s5"/>
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<register name="s6"/>
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<register name="s7"/>
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<register name="s8"/>
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<register name="s9"/>
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<register name="s10"/>
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<register name="s11"/>
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<register name="s1"/>
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<register name="s2"/>
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<register name="s3"/>
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<register name="s4"/>
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<register name="s5"/>
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<register name="s6"/>
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<register name="s7"/>
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<register name="s8"/>
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<register name="s9"/>
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<register name="s10"/>
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<register name="s11"/>
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</unaffected>
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</prototype>
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</default_proto>
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@ -69,20 +69,20 @@
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</output>
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<unaffected>
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<register name="sp"/>
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<register name="gp"/>
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<register name="tp"/>
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<register name="gp"/>
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<register name="tp"/>
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<register name="s0"/>
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<register name="s1"/>
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<register name="s2"/>
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<register name="s3"/>
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<register name="s4"/>
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<register name="s5"/>
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<register name="s6"/>
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<register name="s7"/>
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<register name="s8"/>
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<register name="s9"/>
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<register name="s10"/>
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<register name="s11"/>
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<register name="s1"/>
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<register name="s2"/>
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<register name="s3"/>
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<register name="s4"/>
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<register name="s5"/>
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<register name="s6"/>
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<register name="s7"/>
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<register name="s8"/>
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<register name="s9"/>
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<register name="s10"/>
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<register name="s11"/>
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</unaffected>
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</prototype>
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</default_proto>
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@ -1,52 +1,45 @@
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<patternlist>
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<patternpairs totalbits="32" postbits="0">
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<patternpairs totalbits="27" postbits="11">
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<!-- Higher confidence patterns, after a return and more defined bits -->
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<prepatterns>
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<!-- 76543210 54321098 32109876 10987654 -->
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<data>10000010 10000000</data> <!-- ret -->
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<data>......01 101.....</data> <!-- c.j imm -->
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<data>10000010 10000000</data> <!-- ret -->
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<data>10000010 10000000 00000000 00000000 </data> <!-- ret; padding -->
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</prepatterns>
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<postpatterns>
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<!-- 76543210 54321098 32109876 10987654 -->
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<data>0.....01 01110001</data> <!-- c.addi16sp sp,-imm -->
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<data>0.....01 00010001</data> <!-- c.addi sp,-imm -->
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<funcstart/>
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</postpatterns>
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</patternpairs>
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<patternpairs totalbits="48" postbits="0">
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<prepatterns>
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<!-- 76543210 54321098 32109876 10987654 -->
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<data>10000010 10000000</data> <!-- ret -->
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<data>......01 101.....</data> <!-- c.j imm -->
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</prepatterns>
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<postpatterns>
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<!-- 76543210 54321098 32109876 10987654 -->
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<data>0.....01 01110001</data> <!-- c.addi16sp sp,-imm -->
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<data>0.....01 00010001</data> <!-- c.addi sp,-imm -->
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<data>00010011 00000001 ....0001 1.......</data> <!-- addi sp,sp,-imm -->
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<data>.0010111 ........ ........ ........</data> <!-- auipc rd,imm-->
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<funcstart/>
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</postpatterns>
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</patternpairs>
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<patternpairs totalbits="48" postbits="0">
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<patternpairs totalbits="16" postbits="11">
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<!-- Medium confidence, more bits, but prepattern are jumps, not return -->
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<prepatterns>
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<!-- 76543210 54321098 32109876 10987654 -->
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<data>01101111 ....0000 ........ ........</data> <!-- j imm -->
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<data>01101111 ....0000 ........ ........</data> <!-- j imm -->
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<data>......01 101..... </data> <!-- c.j imm -->
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<data>......01 101..... 00000000 00000000 </data> <!-- c.j imm; padding -->
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</prepatterns>
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<postpatterns>
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<!-- 76543210 54321098 32109876 10987654 -->
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<data>0.....01 01110001</data> <!-- c.addi16sp sp,-imm -->
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<data>0.....01 00010001</data> <!-- c.addi sp,-imm -->
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<funcstart/>
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</postpatterns>
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</patternpairs>
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<patternpairs totalbits="64" postbits="0">
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<prepatterns>
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<!-- 76543210 54321098 32109876 10987654 -->
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<data>01101111 ....0000 ........ ........</data> <!-- j imm -->
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</prepatterns>
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<postpatterns>
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<!-- 76543210 54321098 32109876 10987654 -->
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<data>0.....01 01110001</data> <!-- c.addi16sp sp,-imm -->
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<data>0.....01 00010001</data> <!-- c.addi sp,-imm -->
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<data>00010011 00000001 ....0001 1.......</data> <!-- addi sp,sp,-imm -->
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<data>.0010111 ........ ........ ........</data> <!-- auipc rd,imm-->
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<funcstart/>
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<possiblefuncstart/>
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</postpatterns>
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</patternpairs>
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</patternlist>
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<patternpairs totalbits="20" postbits="7">
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<!-- Lower confidence, too few bits on start pattern -->
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<prepatterns>
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<data>10000010 10000000</data> <!-- ret -->
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<data>10000010 10000000 00000000 00000000 </data> <!-- ret; padding -->
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<data>......01 101..... 00000000 00000000 </data> <!-- c.j imm; padding -->
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<data>01101111 ....0000 ........ ........</data> <!-- j imm -->
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</prepatterns>
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<postpatterns>
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<data>.0010111 ........ ........ ........</data> <!-- auipc rd,imm-->
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<possiblefuncstart/>
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</postpatterns>
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</patternpairs>
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</patternlist>
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