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AArch32: fixed vselgt

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* added 'and N == V' check missed in the vselcond "gt"
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Sleigh-InSPECtor 2024-05-16 15:06:26 +09:30 • committed by ghidorahrex
parent ff2dab8b15
commit 26acd697ac
1 changed files with 1 additions and 1 deletions
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Ghidra/Processors/ARM/data/languages/ARMv8.sinc
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@ -1327,7 +1327,7 @@ vselcond: "ge"
vselcond: "gt" vselcond: "gt"
is ((TMode=0 & c2021=0b11) is ((TMode=0 & c2021=0b11)
| (TMode=1 & thv_c2021=0b11)) | (TMode=1 & thv_c2021=0b11))
{ tmp:1 = (!ZR); export tmp; } { tmp:1 = (!ZR && NG==OV); export tmp; }
vselcond: "vs" vselcond: "vs"
is ((TMode=0 & c2021=0b01) is ((TMode=0 & c2021=0b01)
| (TMode=1 & thv_c2021=0b01)) | (TMode=1 & thv_c2021=0b01))