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'origin/GP-5336_ghidorahrex_PR-7065_philpem_6805_hcs08_xidx_fix' into
patch (Closes #7065, Closes #7064)
This commit is contained in:
Ryan Kurtz 2025-07-29 08:14:36 -04:00
commit 28b46c5c93
2 changed files with 13 additions and 15 deletions
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19
Ghidra/Processors/HCS08/data/languages/HCS_HC.sinc
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@ -114,15 +114,15 @@ oprx8_16_SP: imm8,SP is imm8 & SP { address:2 = SP + imm8; export *:2 addres
# X or HIX addressing # X or HIX addressing
@if defined(HC05) @if defined(HC05)
oprx8_8_X: imm8,X is imm8 & X { address:2 = zext(X) + imm8; export *:1 address; } oprx8_8_X: imm8,X is imm8 & X { address:2 = zext(X) + imm8; export address; }
oprx16_8_X: imm16,X is imm16 & X { address:2 = zext(X) + imm16; export *:1 address; } oprx16_8_X: imm16,X is imm16 & X { address:2 = zext(X) + imm16; export address; }
comma_X: ","X is X { address:2 = zext(X); export *:1 address; } comma_X: ","X is X { address:2 = zext(X); export address; }
@endif @endif
@if defined(HCS08) || defined(HC08) @if defined(HCS08) || defined(HC08)
oprx8_8_X: imm8,X is imm8 & X { address:2 = HIX + imm8; export *:1 address; } oprx8_8_X: imm8,X is imm8 & X { address:2 = HIX + imm8; export address; }
oprx16_8_X: imm16,X is imm16 & X { address:2 = HIX + imm16; export *:1 address; } oprx16_8_X: imm16,X is imm16 & X { address:2 = HIX + imm16; export address; }
comma_X: ","X is X { address:2 = HIX; export *:1 address; } comma_X: ","X is X { address:2 = HIX; export address; }
@endif @endif
@if defined(HCS08) @if defined(HCS08)
@ -136,9 +136,9 @@ oprx16_16_X: imm16,X is imm16 & X { address:2 = HIX + imm16; export *:2 a
OP1: iopr8i is op4_6=2; iopr8i { export iopr8i; } OP1: iopr8i is op4_6=2; iopr8i { export iopr8i; }
OP1: opr8a_8 is op4_6=3; opr8a_8 { export opr8a_8; } OP1: opr8a_8 is op4_6=3; opr8a_8 { export opr8a_8; }
OP1: opr16a_8 is op4_6=4; opr16a_8 { export opr16a_8; } OP1: opr16a_8 is op4_6=4; opr16a_8 { export opr16a_8; }
OP1: oprx16_8_X is op4_6=5; oprx16_8_X { export oprx16_8_X; } OP1: oprx16_8_X is op4_6=5; oprx16_8_X { export *:1 oprx16_8_X; }
OP1: oprx8_8_X is op4_6=6; oprx8_8_X { export oprx8_8_X; } OP1: oprx8_8_X is op4_6=6; oprx8_8_X { export *:1 oprx8_8_X; }
OP1: comma_X is op4_6=7 & comma_X { export comma_X; } OP1: comma_X is op4_6=7 & comma_X { export *:1 comma_X; }
@if defined(HCS08) || defined(HC08) @if defined(HCS08) || defined(HC08)
op2_opr8a: imm8 is imm8 { export *:1 imm8; } op2_opr8a: imm8 is imm8 { export *:1 imm8; }
@ -2074,4 +2074,3 @@ macro Push2(operand) {
wait(); wait();
} }
@endif @endif

9
Ghidra/Processors/MC6800/data/languages/6805.slaspec
View file

@ -42,13 +42,13 @@ OP1: imm8 is op4_6=3; imm8 { export *:1 imm8; }
OP1: imm16 is op4_6=4; imm16 { export *:1 imm16; } OP1: imm16 is op4_6=4; imm16 { export *:1 imm16; }
OP1: imm16,X is op4_6=5 & X; imm16 { tmp:2 = imm16 + zext(X); export *:1 tmp; } OP1: imm16,X is op4_6=5 & X; imm16 { tmp:2 = imm16 + zext(X); export *:1 tmp; }
OP1: imm8,X is op4_6=6 & X; imm8 { tmp:2 = imm8 + zext(X); export *:1 tmp; } OP1: imm8,X is op4_6=6 & X; imm8 { tmp:2 = imm8 + zext(X); export *:1 tmp; }
OP1: X is op4_6=7 & X { tmp:2 = zext(X); export *:1 tmp; } OP1: ","X is op4_6=7 & X { tmp:2 = zext(X); export *:1 tmp; }
ADDR: imm8 is op4_6=3; imm8 { export *:1 imm8; } ADDR: imm8 is op4_6=3; imm8 { export *:1 imm8; }
ADDR: imm16 is op4_6=4; imm16 { export *:1 imm16; } ADDR: imm16 is op4_6=4; imm16 { export *:1 imm16; }
ADDRI: imm16,X is op4_6=5 & X; imm16 { tmp:2 = imm16 + zext(X); export tmp; } ADDRI: imm16,X is op4_6=5 & X; imm16 { tmp:2 = imm16 + zext(X); export *:1 tmp; }
ADDRI: imm8,X is op4_6=6 & X; imm8 { tmp:2 = imm8 + zext(X); export tmp; } ADDRI: imm8,X is op4_6=6 & X; imm8 { tmp:2 = imm8 + zext(X); export *:1 tmp; }
ADDRI: X is op4_6=7 & X { tmp:2 = zext(X); export tmp; } ADDRI: ","X is op4_6=7 & X { tmp:2 = zext(X); export *:1 tmp; }
DIRECT: imm8 is imm8 { export *:1 imm8; } DIRECT: imm8 is imm8 { export *:1 imm8; }
@ -666,4 +666,3 @@ DIRECT: imm8 is imm8 { export *:1 imm8; }
{ {
I = 0; I = 0;
} }