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Merge remote-tracking branch 'origin/GP-4849_RegisterVolatile'

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(Closes #6755)
This commit is contained in:
Ryan Kurtz 2024-08-28 07:43:19 -04:00
commit 62d0682d04
9 changed files with 85 additions and 73 deletions
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48
Ghidra/Features/Decompiler/src/decompile/cpp/architecture.cc
View file

@ -4,9 +4,9 @@
* Licensed under the Apache License, Version 2.0 (the "License");
* you may not use this file except in compliance with the License.
* You may obtain a copy of the License at
*
*
* http://www.apache.org/licenses/LICENSE-2.0
*
*
* Unless required by applicable law or agreed to in writing, software
* distributed under the License is distributed on an "AS IS" BASIS,
* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
@ -924,23 +924,47 @@ void Architecture::decodeIncidentalCopy(Decoder &decoder)
decoder.closeElement(elemId);
}
/// Look for \<register> elements that have a \e vector_lane_size attribute.
/// Record these so that the decompiler can split large registers into appropriate lane size pieces.
/// Read \<register> elements to collect specific properties associated with the register storage.
/// \param decoder is the stream decoder
void Architecture::decodeLaneSizes(Decoder &decoder)
void Architecture::decodeRegisterData(Decoder &decoder)
{
vector<uint4> maskList;
LanedRegister lanedRegister; // Only allocate once
uint4 elemId = decoder.openElement(ELEM_REGISTER_DATA);
while(decoder.peekElement() != 0) {
if (lanedRegister.decode(decoder)) {
int4 sizeIndex = lanedRegister.getWholeSize();
while (maskList.size() <= sizeIndex)
maskList.push_back(0);
maskList[sizeIndex] |= lanedRegister.getSizeBitMask();
uint4 subId = decoder.openElement(ELEM_REGISTER);
bool isVolatile = false;
string laneSizes;
for(;;) {
uint4 attribId = decoder.getNextAttributeId();
if (attribId == 0) break;
if (attribId == ATTRIB_VECTOR_LANE_SIZES) {
laneSizes = decoder.readString();
}
else if (attribId == ATTRIB_VOLATILE) {
isVolatile = decoder.readBool();
}
}
if (!laneSizes.empty() || isVolatile) {
decoder.rewindAttributes();
VarnodeData storage;
storage.space = (AddrSpace *)0;
storage.decodeFromAttributes(decoder);
if (!laneSizes.empty()) {
LanedRegister lanedRegister;
lanedRegister.parseSizes(storage.size,laneSizes);
int4 sizeIndex = lanedRegister.getWholeSize();
while (maskList.size() <= sizeIndex)
maskList.push_back(0);
maskList[sizeIndex] |= lanedRegister.getSizeBitMask();
}
if (isVolatile) {
Range range( storage.space, storage.offset, storage.offset+storage.size-1);
symboltab->setPropertyRange(Varnode::volatil,range);
}
}
decoder.closeElement(subId);
}
decoder.closeElement(elemId);
lanerecords.clear();
@ -1172,7 +1196,7 @@ void Architecture::parseProcessorConfig(DocumentStorage &store)
else if (subId == ELEM_SEGMENTOP)
userops.decodeSegmentOp(decoder,this);
else if (subId == ELEM_REGISTER_DATA) {
decodeLaneSizes(decoder);
decodeRegisterData(decoder);
}
else if (subId == ELEM_DATA_SPACE) {
uint4 elemId = decoder.openElement();

6
Ghidra/Features/Decompiler/src/decompile/cpp/architecture.hh
View file

@ -4,9 +4,9 @@
* Licensed under the Apache License, Version 2.0 (the "License");
* you may not use this file except in compliance with the License.
* You may obtain a copy of the License at
*
*
* http://www.apache.org/licenses/LICENSE-2.0
*
*
* Unless required by applicable law or agreed to in writing, software
* distributed under the License is distributed on an "AS IS" BASIS,
* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
@ -368,7 +368,7 @@ protected:
void decodeVolatile(Decoder &decoder); ///< Apply volatile region configuration
void decodeReturnAddress(Decoder &decoder); ///< Apply return address configuration
void decodeIncidentalCopy(Decoder &decoder); ///< Apply incidental copy configuration
void decodeLaneSizes(Decoder &decoder); ///< Apply lane size configuration
void decodeRegisterData(Decoder &decoder); ///< Read specific register properties
void decodeStackPointer(Decoder &decoder); ///< Apply stack pointer configuration
void decodeDeadcodeDelay(Decoder &decoder); ///< Apply dead-code delay configuration
void decodeInferPtrBounds(Decoder &decoder); ///< Apply pointer inference bounds

34
Ghidra/Features/Decompiler/src/decompile/cpp/transform.cc
View file

@ -4,9 +4,9 @@
* Licensed under the Apache License, Version 2.0 (the "License");
* you may not use this file except in compliance with the License.
* You may obtain a copy of the License at
*
*
* http://www.apache.org/licenses/LICENSE-2.0
*
*
* Unless required by applicable law or agreed to in writing, software
* distributed under the License is distributed on an "AS IS" BASIS,
* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
@ -294,32 +294,13 @@ void LanedRegister::LanedIterator::normalize(void)
size = -1; // Indicate ending iterator
}
/// Parse any vector lane sizes.
/// \param decoder is the stream decoder
/// \return \b true if the XML description provides lane sizes
bool LanedRegister::decode(Decoder &decoder)
/// Collect specific lane sizes in this object.
/// \param registerSize is the size of the laned register in bytes
/// \param laneSizes is a comma separated list of sizes
void LanedRegister::parseSizes(int4 registerSize,string laneSizes)
{
uint4 elemId = decoder.openElement(ELEM_REGISTER);
string laneSizes;
for(;;) {
uint4 attribId = decoder.getNextAttributeId();
if (attribId == 0) break;
if (attribId == ATTRIB_VECTOR_LANE_SIZES) {
laneSizes = decoder.readString();
break;
}
}
if (laneSizes.empty()) {
decoder.closeElement(elemId);
return false;
}
decoder.rewindAttributes();
VarnodeData storage;
storage.space = (AddrSpace *)0;
storage.decodeFromAttributes(decoder);
decoder.closeElement(elemId);
wholeSize = storage.size;
wholeSize = registerSize;
sizeBitMask = 0;
string::size_type pos = 0;
while(pos != string::npos) {
@ -343,7 +324,6 @@ bool LanedRegister::decode(Decoder &decoder)
throw LowlevelError("Bad lane size: " + value);
addLaneSize(sz);
}
return true;
}
TransformManager::~TransformManager(void)

6
Ghidra/Features/Decompiler/src/decompile/cpp/transform.hh
View file

@ -4,9 +4,9 @@
* Licensed under the Apache License, Version 2.0 (the "License");
* you may not use this file except in compliance with the License.
* You may obtain a copy of the License at
*
*
* http://www.apache.org/licenses/LICENSE-2.0
*
*
* Unless required by applicable law or agreed to in writing, software
* distributed under the License is distributed on an "AS IS" BASIS,
* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
@ -115,7 +115,7 @@ private:
public:
LanedRegister(void) { wholeSize = 0; sizeBitMask = 0; } ///< Constructor for use with decode
LanedRegister(int4 sz,uint4 mask) { wholeSize = sz; sizeBitMask = mask; } ///< Constructor
bool decode(Decoder &decoder); ///< Parse \<register> elements for lane sizes
void parseSizes(int4 registerSize,string laneSizes); ///< Parse a \e vector_lane_sizes attribute
int4 getWholeSize(void) const { return wholeSize; } ///< Get the size in bytes of the whole laned register
uint4 getSizeBitMask(void) const { return sizeBitMask; } ///< Get the bit mask of possible lane sizes
void addLaneSize(int4 size) { sizeBitMask |= ((uint4)1 << size); } ///< Add a new \e size to the allowed list