diff --git a/Ghidra/Features/Decompiler/src/decompile/cpp/funcdata_varnode.cc b/Ghidra/Features/Decompiler/src/decompile/cpp/funcdata_varnode.cc
index 00258dcb96..4956f44da0 100644
--- a/Ghidra/Features/Decompiler/src/decompile/cpp/funcdata_varnode.cc
+++ b/Ghidra/Features/Decompiler/src/decompile/cpp/funcdata_varnode.cc
@@ -4,9 +4,9 @@
  * Licensed under the Apache License, Version 2.0 (the "License");
  * you may not use this file except in compliance with the License.
  * You may obtain a copy of the License at
- *
+ * 
  *      http://www.apache.org/licenses/LICENSE-2.0
- *
+ * 
  * Unless required by applicable law or agreed to in writing, software
  * distributed under the License is distributed on an "AS IS" BASIS,
  * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
diff --git a/Ghidra/Processors/MIPS/certification.manifest b/Ghidra/Processors/MIPS/certification.manifest
index 182ff5a607..1152c9daf4 100644
--- a/Ghidra/Processors/MIPS/certification.manifest
+++ b/Ghidra/Processors/MIPS/certification.manifest
@@ -5,14 +5,15 @@ data/languages/mips.dwarf||GHIDRA||||END|
 data/languages/mips.ldefs||GHIDRA||||END|
 data/languages/mips.sinc||GHIDRA||||END|
 data/languages/mips16.sinc||GHIDRA||||END|
-data/languages/mips32.cspec||GHIDRA||||END|
 data/languages/mips32.pspec||GHIDRA||||END|
 data/languages/mips32Instructions.sinc||GHIDRA||||END|
 data/languages/mips32R6.pspec||GHIDRA||||END|
 data/languages/mips32R6be.slaspec||GHIDRA||||END|
 data/languages/mips32R6le.slaspec||GHIDRA||||END|
 data/languages/mips32_fp64.cspec||GHIDRA||||END|
+data/languages/mips32be.cspec||GHIDRA||||END|
 data/languages/mips32be.slaspec||GHIDRA||||END|
+data/languages/mips32le.cspec||GHIDRA||||END|
 data/languages/mips32le.slaspec||GHIDRA||||END|
 data/languages/mips32micro.pspec||GHIDRA||||END|
 data/languages/mips64.cspec||GHIDRA||||END|
diff --git a/Ghidra/Processors/MIPS/data/languages/mips.ldefs b/Ghidra/Processors/MIPS/data/languages/mips.ldefs
index abedb93a34..e7281050ad 100644
--- a/Ghidra/Processors/MIPS/data/languages/mips.ldefs
+++ b/Ghidra/Processors/MIPS/data/languages/mips.ldefs
@@ -10,8 +10,8 @@
             manualindexfile="../manuals/mipsM16.idx"
             id="MIPS:BE:32:default">
     <description>MIPS32 32-bit addresses, big endian, with mips16e</description>
-    <compiler name="default" spec="mips32.cspec" id="default"/>
-    <compiler name="Visual Studio" spec="mips32.cspec" id="windows"/>
+    <compiler name="default" spec="mips32be.cspec" id="default"/>
+    <compiler name="Visual Studio" spec="mips32be.cspec" id="windows"/>
     <external_name tool="gnu" name="mips:4000"/>
     <external_name tool="IDA-PRO" name="mipsb"/>
     <external_name tool="DWARF.register.mapping.file" name="mips.dwarf"/>
@@ -26,8 +26,8 @@
             manualindexfile="../manuals/mipsM16.idx"
             id="MIPS:LE:32:default">
     <description>MIPS32 32-bit addresses, little endian, with mips16e</description>
-    <compiler name="default" spec="mips32.cspec" id="default"/>
-    <compiler name="Visual Studio" spec="mips32.cspec" id="windows"/>
+    <compiler name="default" spec="mips32le.cspec" id="default"/>
+    <compiler name="Visual Studio" spec="mips32le.cspec" id="windows"/>
     <external_name tool="gnu" name="mips:4000"/>
     <external_name tool="IDA-PRO" name="mipsl"/>
     <external_name tool="DWARF.register.mapping.file" name="mips.dwarf"/>
@@ -284,7 +284,7 @@
             manualindexfile="../manuals/mipsMic.idx"
             id="MIPS:BE:32:micro">
     <description>MIPS32 32-bit addresses, big endian, with microMIPS</description>
-    <compiler name="default" spec="mips32.cspec" id="default"/>
+    <compiler name="default" spec="mips32be.cspec" id="default"/>
     <external_name tool="gnu" name="mips:micromips"/>
     <external_name tool="IDA-PRO" name="mipsb"/>
     <external_name tool="DWARF.register.mapping.file" name="mips.dwarf"/>
@@ -299,8 +299,8 @@
             manualindexfile="../manuals/mipsMic.idx"
             id="MIPS:LE:32:micro">
     <description>MIPS32 32-bit addresses, little endian, with microMIPS</description>
-    <compiler name="default" spec="mips32.cspec" id="default"/>
-    <compiler name="Visual Studio" spec="mips32.cspec" id="windows"/>
+    <compiler name="default" spec="mips32le.cspec" id="default"/>
+    <compiler name="Visual Studio" spec="mips32le.cspec" id="windows"/>
     <external_name tool="IDA-PRO" name="mipsl"/>
     <external_name tool="DWARF.register.mapping.file" name="mips.dwarf"/>
   </language>
diff --git a/Ghidra/Processors/MIPS/data/languages/mips32.cspec b/Ghidra/Processors/MIPS/data/languages/mips32be.cspec
similarity index 100%
rename from Ghidra/Processors/MIPS/data/languages/mips32.cspec
rename to Ghidra/Processors/MIPS/data/languages/mips32be.cspec
diff --git a/Ghidra/Processors/MIPS/data/languages/mips32le.cspec b/Ghidra/Processors/MIPS/data/languages/mips32le.cspec
new file mode 100644
index 0000000000..628b8b4756
--- /dev/null
+++ b/Ghidra/Processors/MIPS/data/languages/mips32le.cspec
@@ -0,0 +1,90 @@
+<?xml version="1.0" encoding="UTF-8"?>
+
+<compiler_spec>
+  <data_organization>
+        <pointer_size value="4"/>
+        <float_size value="4" />
+        <double_size value="8" />
+        <long_double_size value="8" />
+        <size_alignment_map>
+			<entry size="1" alignment="1" />
+			<entry size="2" alignment="2" />
+			<entry size="4" alignment="4" />
+			<entry size="8" alignment="8" />
+		</size_alignment_map>
+  </data_organization>
+
+  <stackpointer register="sp" space="ram"/>
+  <funcptr align="2"/>
+  <spacebase name="gp" register="gp" space="ram"/>
+  <global>
+    <range space="gp"/>
+    <range space="ram"/>
+    <range space="register" first="0x2000" last="0x2fff"/>
+  </global>
+  <returnaddress>
+    <register name="ra"/>
+  </returnaddress>
+  <default_proto>
+    <prototype name="__stdcall" extrapop="0" stackshift="0">
+      <input>
+        <pentry minsize="1" maxsize="8" metatype="float">
+          <register name="f12_13"/>
+        </pentry>
+        <pentry minsize="1" maxsize="8" metatype="float">
+          <register name="f14_15"/>
+        </pentry>
+        <pentry minsize="1" maxsize="4">
+          <register name="a0"/>
+        </pentry>
+        <pentry minsize="1" maxsize="4">
+          <register name="a1"/>
+        </pentry>
+        <pentry minsize="1" maxsize="4">
+          <register name="a2"/>
+        </pentry>
+        <pentry minsize="1" maxsize="4">
+          <register name="a3"/>
+        </pentry>
+        <pentry minsize="1" maxsize="500" align="4">
+          <addr offset="16" space="stack"/>
+        </pentry>
+      </input>
+      <output>
+        <pentry minsize="1" maxsize="8" metatype="float">
+          <register name="f0_1"/>
+        </pentry>
+        <pentry minsize="1" maxsize="4">
+          <register name="v0"/>
+        </pentry>
+		<pentry minsize="5" maxsize="8">
+          <addr space="join" piece1="v1" piece2="v0"/>
+        </pentry>
+      </output>
+      <unaffected>
+        <register name="s0"/>
+        <register name="s1"/>
+        <register name="s2"/>
+        <register name="s3"/>
+        <register name="s4"/>
+        <register name="s5"/>
+        <register name="s6"/>
+        <register name="s7"/>
+        <register name="s8"/>
+        <register name="sp"/>
+        <register name="gp"/>
+        <register name="f20"/>
+        <register name="f22"/>
+        <register name="f24"/>
+        <register name="f26"/>
+        <register name="f28"/>
+        <register name="f30"/>
+      </unaffected>
+      <localrange>
+        <range space="stack" first="0xfff0bdc0" last="0xffffffff"/>
+        <range space="stack" first="0" last="15"/>  <!-- This is backup storage space for register params, but we treat as locals -->
+      </localrange>
+    </prototype>
+  </default_proto>
+    
+</compiler_spec>