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Code Issues Releases Wiki Activity

AllowedLanes in Architecture

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This commit is contained in:
caheckman 2019-10-17 15:45:12 -04:00
parent 31eab44f54
commit 90182c6251
6 changed files with 79 additions and 3 deletions
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4
Ghidra/Features/Decompiler/src/decompile/cpp/subflow.cc
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@ -2006,7 +2006,6 @@ bool LaneDivide::buildPiece(PcodeOp *op,TransformVar *outVars,int4 numLanes,int4
{
int4 highLanes,highSkip;
int4 lowLanes,lowSkip;
TransformVar *highVars,*lowVars;
Varnode *outVn = op->getOut();
Varnode *highVn = op->getIn(0);
Varnode *lowVn = op->getIn(1);
@ -2245,6 +2244,7 @@ bool LaneDivide::traceForward(TransformVar *rvn,int4 numLanes,int4 skipLanes)
return false;
}
}
return true;
}
/// \brief Pull the logical lanes back through the defining PcodeOp of the given variable
@ -2316,7 +2316,7 @@ bool LaneDivide::traceBackward(TransformVar *rvn,int4 numLanes,int4 skipLanes)
bool LaneDivide::processNextWork(void)
{
TransformVar *rvn = workList.back();
TransformVar *rvn = workList.back().lanes;
int4 numLanes = workList.back().numLanes;
int4 skipLanes = workList.back().skipLanes;