From a69e92948c28e332efc598548f0ef91b24f5605c Mon Sep 17 00:00:00 2001 From: ghidorahrex Date: Tue, 19 Oct 2021 09:39:18 -0400 Subject: [PATCH] removed extraneous additional "SB" from the ldrsb instruction. --- Ghidra/Processors/ARM/data/languages/ARMinstructions.sinc | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/Ghidra/Processors/ARM/data/languages/ARMinstructions.sinc b/Ghidra/Processors/ARM/data/languages/ARMinstructions.sinc index 61cd24752b..a8f3e4bfd9 100644 --- a/Ghidra/Processors/ARM/data/languages/ARMinstructions.sinc +++ b/Ghidra/Processors/ARM/data/languages/ARMinstructions.sinc @@ -2850,7 +2850,7 @@ ArmPCRelImmed12: reloff is U23=0 & immed & rotate @endif # VERSION_6T2 -:ldrsb^COND^"sb" Rd,addrmode3 is $(AMODE) & COND & c2527=0 & L20=1 & c0407=13 & Rd & addrmode3 +:ldrsb^COND Rd,addrmode3 is $(AMODE) & COND & c2527=0 & L20=1 & c0407=13 & Rd & addrmode3 { build COND; build addrmode3;