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GT-3254: PPC VLE Corrected signed immediate offset calculation (fixes

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#1160)
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ghidorahrex 2019-10-24 07:18:18 -04:00 • committed by Ryan Kurtz
parent 2ab04ae86d
commit b514a2c9ec
2 changed files with 1 additions and 2 deletions
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1
Ghidra/Processors/PowerPC/data/languages/ppc_common.sinc
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@ -1002,7 +1002,6 @@ define token instr(32)
IMM_11_15_VLE=(11,14)
IMM_16_20_VLE=(16,20)
IMM_21_25_VLE=(21,25)
SIMM_0_10_VLE=(0,10) signed
SIMM_11_14_VLE=(11,14) signed
SIMM_21_25_VLE=(21,25) signed
SCL_VLE=(8,9)

2
Ghidra/Processors/PowerPC/data/languages/ppc_vle.sinc
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@ -44,7 +44,7 @@ SCALE: val is BIT_10 & SCL_VLE & IMM8 [ val = (((0xFFFFFFFF << ((SCL_VLE*8)
SCALE: val is BIT_10 & SCL_VLE & IMM8 [ val = (((0xFFFFFFFFFFFFFFFF << ((SCL_VLE*8) + 8)) | (0x7FFFFFFFFFFFFFFF >> (63 - (SCL_VLE*8)))) * BIT_10) | (IMM8 << (SCL_VLE*8)); ] { export *[const]:8 val;}
@endif
SIMM16: val is SIMM_0_10_VLE & SIMM_21_25_VLE [ val = (SIMM_21_25_VLE << 11) | SIMM_0_10_VLE ;] { export *[const]:2 val; }
SIMM16: val is IMM_0_10_VLE & SIMM_21_25_VLE [ val = (SIMM_21_25_VLE << 11) | IMM_0_10_VLE ;] { export *[const]:2 val; }
SIMM20: val is IMM_0_10_VLE & IMM_16_20_VLE & SIMM_11_14_VLE [ val = (SIMM_11_14_VLE << 16 ) | (IMM_16_20_VLE << 11) | IMM_0_10_VLE ;] { export *[const]:2 val; }
IMM16: val is IMM_0_10_VLE & IMM_21_25_VLE [ val = (IMM_21_25_VLE << 11) | IMM_0_10_VLE ;] { export *[const]:2 val; }
IMM16B: val is IMM_0_10_VLE & IMM_16_20_VLE [ val = (IMM_16_20_VLE << 11) | IMM_0_10_VLE ;] { export *[const]:2 val; }