From 220763c40f947e170d4892692539e7214fef081f Mon Sep 17 00:00:00 2001
From: Behrang Fouladi <iyr@firmalyzer.com>
Date: Mon, 24 Apr 2023 12:25:49 +0200
Subject: [PATCH 1/4] instruction decoding for armv8 stack pointer limit
 registers

---
 .../data/languages/ARMTHUMBinstructions.sinc  | 36 +++++++++++++++++++
 1 file changed, 36 insertions(+)

diff --git a/Ghidra/Processors/ARM/data/languages/ARMTHUMBinstructions.sinc b/Ghidra/Processors/ARM/data/languages/ARMTHUMBinstructions.sinc
index f210fab0e9..932481c4ed 100644
--- a/Ghidra/Processors/ARM/data/languages/ARMTHUMBinstructions.sinc
+++ b/Ghidra/Processors/ARM/data/languages/ARMTHUMBinstructions.sinc
@@ -2814,6 +2814,42 @@ control: "control" 			is epsilon {}
   Rd0811 = zext((altStackMode << 1) | notPrivileged);
 }
 
+define pcodeop setMainStackPointerLimit;
+
+msplim: "msplim" 		    is epsilon {}
+
+:msr^ItCond msplim,Rn0003 		is TMode=1 & ItCond & op4=0xf38 & Rn0003; op12=0x8 & th_psrmask=8 & sysm=10 & msplim
+{
+  build ItCond;
+  setMainStackPointerLimit(Rn0003);
+}
+
+define pcodeop setProcStackPointerLimit;
+
+psplim: "psplim"            is epsilon {}
+
+:msr^ItCond psplim,Rn0003 		is TMode=1 & ItCond & op4=0xf38 & Rn0003; op12=0x8 & th_psrmask=8 & sysm=11 & psplim
+{
+  build ItCond;
+  setProcStackPointerLimit(Rn0003);
+}
+
+define pcodeop getMainStackPointerLimit;
+
+:mrs^ItCond Rd0811,msplim 		is TMode=1 & ItCond & op0=0xf3ff; op12=0x8 & Rd0811 & sysm=10 & msplim
+{
+  build ItCond;
+  Rd0811 = getMainStackPointerLimit();
+}
+
+define pcodeop getProcessStackPointerLimit;
+
+:mrs^ItCond Rd0811,psplim 		is TMode=1 & ItCond & op0=0xf3ff; op12=0x8 & Rd0811 & sysm=11 & psplim
+{
+  build ItCond;
+  Rd0811 = getProcessStackPointerLimit();
+}
+
 @endif
 
 :mrs^ItCond Rd0811,cpsr 		is TMode=1 & ItCond & op0=0xf3ef; op12=0x8 & Rd0811 & sysm=0 & cpsr

From bb39e4398be04f4f1762e68983cc972f1b9605a7 Mon Sep 17 00:00:00 2001
From: befoulad <behrang@neominds.org>
Date: Sun, 8 Dec 2024 18:49:34 +0000
Subject: [PATCH 2/4] define stack limit registers for armv8-m

---
 Ghidra/Processors/ARM/data/languages/ARM.sinc | 4 ++++
 1 file changed, 4 insertions(+)

diff --git a/Ghidra/Processors/ARM/data/languages/ARM.sinc b/Ghidra/Processors/ARM/data/languages/ARM.sinc
index 2a8cd18502..05318f628c 100644
--- a/Ghidra/Processors/ARM/data/languages/ARM.sinc
+++ b/Ghidra/Processors/ARM/data/languages/ARM.sinc
@@ -75,6 +75,10 @@ define register offset=0x0200 size=4 [ cr0 cr1 cr2 cr3 cr4 cr5 cr6 cr7 cr8 cr9 c
 
 @endif # SIMD
 
+@if defined(CORTEX)
+  define register offset=0x400 size=4  [ msplim psplim ];
+@endif
+
 # Define context bits
 # WARNING: when adjusting context keep compiler packing in mind
 # and make sure fields do not span a 32-bit boundary before or 

From 0c43ccb360fdb3815ab6c549107e2de65a7866b8 Mon Sep 17 00:00:00 2001
From: befoulad <behrang@neominds.org>
Date: Sun, 8 Dec 2024 18:52:24 +0000
Subject: [PATCH 3/4] wrap stack limit instruction decoders in ifdef block

---
 .../ARM/data/languages/ARMTHUMBinstructions.sinc       | 10 +++++-----
 1 file changed, 5 insertions(+), 5 deletions(-)

diff --git a/Ghidra/Processors/ARM/data/languages/ARMTHUMBinstructions.sinc b/Ghidra/Processors/ARM/data/languages/ARMTHUMBinstructions.sinc
index c865027165..e86c36410e 100644
--- a/Ghidra/Processors/ARM/data/languages/ARMTHUMBinstructions.sinc
+++ b/Ghidra/Processors/ARM/data/languages/ARMTHUMBinstructions.sinc
@@ -2858,9 +2858,11 @@ control: "control" 			is epsilon {}
   Rd0811 = zext((altStackMode << 1) | notPrivileged);
 }
 
-define pcodeop setMainStackPointerLimit;
+@endif
 
-msplim: "msplim" 		    is epsilon {}
+@if defined(CORTEX)
+
+define pcodeop setMainStackPointerLimit;
 
 :msr^ItCond msplim,Rn0003 		is TMode=1 & ItCond & op4=0xf38 & Rn0003; op12=0x8 & th_psrmask=8 & sysm=10 & msplim
 {
@@ -2870,8 +2872,6 @@ msplim: "msplim" 		    is epsilon {}
 
 define pcodeop setProcStackPointerLimit;
 
-psplim: "psplim"            is epsilon {}
-
 :msr^ItCond psplim,Rn0003 		is TMode=1 & ItCond & op4=0xf38 & Rn0003; op12=0x8 & th_psrmask=8 & sysm=11 & psplim
 {
   build ItCond;
@@ -2894,7 +2894,7 @@ define pcodeop getProcessStackPointerLimit;
   Rd0811 = getProcessStackPointerLimit();
 }
 
-@endif
+@endif #CORTEX
 
 :mrs^ItCond Rd0811,cpsr 		is TMode=1 & ItCond & op0=0xf3ef; op12=0x8 & Rd0811 & sysm=0 & cpsr
 {

From e6b326700c140ca0279c9fd31a59374941dfd721 Mon Sep 17 00:00:00 2001
From: ghidorahrex <ghidorahrex@users.noreply.github.com>
Date: Thu, 16 Jan 2025 20:13:39 +0000
Subject: [PATCH 4/4] GP-4731: Fixed decode for mrs

---
 .../Processors/ARM/data/languages/ARMTHUMBinstructions.sinc   | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/Ghidra/Processors/ARM/data/languages/ARMTHUMBinstructions.sinc b/Ghidra/Processors/ARM/data/languages/ARMTHUMBinstructions.sinc
index e86c36410e..7e1e1c85a1 100644
--- a/Ghidra/Processors/ARM/data/languages/ARMTHUMBinstructions.sinc
+++ b/Ghidra/Processors/ARM/data/languages/ARMTHUMBinstructions.sinc
@@ -2880,7 +2880,7 @@ define pcodeop setProcStackPointerLimit;
 
 define pcodeop getMainStackPointerLimit;
 
-:mrs^ItCond Rd0811,msplim 		is TMode=1 & ItCond & op0=0xf3ff; op12=0x8 & Rd0811 & sysm=10 & msplim
+:mrs^ItCond Rd0811,msplim 		is TMode=1 & ItCond & op0=0xf3ef; op12=0x8 & Rd0811 & sysm=10 & msplim
 {
   build ItCond;
   Rd0811 = getMainStackPointerLimit();
@@ -2888,7 +2888,7 @@ define pcodeop getMainStackPointerLimit;
 
 define pcodeop getProcessStackPointerLimit;
 
-:mrs^ItCond Rd0811,psplim 		is TMode=1 & ItCond & op0=0xf3ff; op12=0x8 & Rd0811 & sysm=11 & psplim
+:mrs^ItCond Rd0811,psplim 		is TMode=1 & ItCond & op0=0xf3ef; op12=0x8 & Rd0811 & sysm=11 & psplim
 {
   build ItCond;
   Rd0811 = getProcessStackPointerLimit();