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More x86 changes to accomodate protected mode

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This commit is contained in:
caheckman 2019-08-26 14:02:14 -04:00
parent b0d90cf36f
commit faf93508e6
2 changed files with 7 additions and 5 deletions
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8
Ghidra/Processors/x86/data/languages/ia.sinc
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@ -1056,6 +1056,8 @@ addr64: [Base64 + Index64*ss] is mod=2 & r_m=4; Index64 & Base64 & ss; imm32=0
addr64: [Base64] is mod=2 & r_m=4; rexXprefix=0 & index64=4 & Base64; imm32=0 { export Base64; }
@endif
currentCS: CS is protectedMode=0 & CS { tmp:4 = (inst_next >> 4) & 0xf000; CS = tmp:2; export CS; }
currentCS: CS is protectedMode=1 & CS { tmp:4 = (inst_next >> 16) & 0xffff; CS = tmp:2; export CS; }
segWide: is segover=0 { export 0:$(SIZE); }
segWide: CS: is segover=1 & CS { export 0:$(SIZE); }
@ -1066,7 +1068,7 @@ segWide: FS: is segover=5 & FS { export FS_OFFSET; }
segWide: GS: is segover=6 & GS { export GS_OFFSET; }
seg16: is segover=0 { export DS; }
seg16: CS: is segover=1 & CS { export CS; }
seg16: currentCS: is segover=1 & currentCS { export currentCS; }
seg16: SS: is segover=2 & SS { export SS; }
seg16: DS: is segover=3 & DS { export DS; }
seg16: ES: is segover=4 & ES { export ES; }
@ -2709,7 +2711,7 @@ Suffix3D: imm8 is imm8 [ suffix3D=imm8; ] { }
@ifdef IA64
:CALL rel32 is vexMode=0 & addrsize=2 & (opsize=1 | opsize=2) & byte=0xe8; simm32=0 & rel32 { push88(&:8 inst_next); goto rel32; }
@endif
:CALL rm16 is addrsize=0 & opsize=0 & byte=0xff; rm16 & reg_opcode=2 ... { push22(&:2 inst_next); tmp:4 = segment(CS,rm16); call [tmp]; }
:CALL rm16 is addrsize=0 & opsize=0 & byte=0xff & currentCS; rm16 & reg_opcode=2 ... { push22(&:2 inst_next); tmp:4 = segment(currentCS,rm16); call [tmp]; }
:CALL rm16 is vexMode=0 & addrsize=1 & opsize=0 & byte=0xff; rm16 & reg_opcode=2 ... { push42(&:2 inst_next); call [rm16]; }
@ifdef IA64
:CALL rm16 is vexMode=0 & addrsize=2 & opsize=0 & byte=0xff; rm16 & reg_opcode=2 ... { push82(&:2 inst_next); tmp:8 = inst_next + zext(rm16); call [tmp]; }
@ -3413,7 +3415,7 @@ enterFrames: low5 is low5 { tmp:1 = low5; export tmp; }
:JMP rel16 is vexMode=0 & opsize=0 & byte=0xe9; rel16 { goto rel16; }
:JMP rel32 is vexMode=0 & opsize=1 & byte=0xe9; rel32 { goto rel32; }
:JMP rel32 is vexMode=0 & opsize=2 & byte=0xe9; rel32 { goto rel32; }
:JMP rm16 is vexMode=0 & addrsize=0 & opsize=0 & byte=0xff; rm16 & reg_opcode=4 ... { target:4 = segment(CS,rm16); goto [target]; }
:JMP rm16 is vexMode=0 & addrsize=0 & opsize=0 & byte=0xff & currentCS; rm16 & reg_opcode=4 ... { target:4 = segment(currentCS,rm16); goto [target]; }
:JMP rm16 is vexMode=0 & addrsize=1 & opsize=0 & byte=0xff; rm16 & reg_opcode=4 ... { goto [rm16]; }
:JMP rm32 is vexMode=0 & addrsize=1 & opsize=1 & byte=0xff; rm32 & reg_opcode=4 ... { goto [rm32]; }
@ifdef IA64

2
Ghidra/Processors/x86/data/languages/x86.opinion
View file

@ -37,7 +37,7 @@
<constraint primary="23117" processor="x86" endian="little" size="16" variant="Real Mode"/>
</constraint>
<constraint loader="New Executable (NE)" compilerSpecID="default">
<constraint primary="17742" processor="x86" endian="little" size="16" variant="Real Mode"/>
<constraint primary="17742" processor="x86" endian="little" size="16" variant="Protected Mode"/>
</constraint>
<constraint loader="Mac OS X Mach-O" compilerSpecID="gcc">
<constraint primary="7" processor="x86" endian="little" size="32" />