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4839 commits 3 branches 48 tags 433 MiB
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661 commits

Author SHA1 Message Date
ghidra1
0a24532bf7 GP-1110 Refactor ElfDefaultGotPltMarkup.processDynamicPLTGOT implementation, Correct duplicate ELF relocation table processing, and other minor ELF cleanup 2021-08-02 15:58:37 -04:00
ghidra1
a1bee163d1 GP-1090 added support for a few more SuperH ELF Relocation types 2021-07-07 15:03:34 -04:00
ghidra1
c2652d36d1 GP-1090 Added SuperH/SuperH4 ELF relocation handler and improved performance of ELF filler segment pruning to avoid uneccessary block creation 2021-07-06 17:12:18 -04:00
ghidra1
879a249fb1 GP-1063 corrected ARMv5 emulation issue 2021-07-02 09:14:56 -04:00
ghidra1
00ba983a42 Merge remote-tracking branch 'origin/GP-1029_ghidra1_ElfExternalRelocations--SQUASHED' into Ghidra_10.0 2021-06-09 18:26:43 -04:00
ghidra1
e89a8dcde3 GP-1029 Detect and mark unsupported EXTERNAL data relocation and correct MIPS compound relocation processing bug. 2021-06-09 18:26:05 -04:00
ghidra1
5321fe7dd8 Merge remote-tracking branch 
'origin/GP-753_ghidorahrex_PR-2864_VGKintsugi_VGKintsugi-div1' into
Ghidra_10.0 (Closes #2864, Closes #2863)
 2021-06-09 17:14:53 -04:00
ghidra1
9fd4af2d7c Merge remote-tracking branch 
'origin/GP-954_ghidorahrex_x86_64_stack_push--SQUASHED' into Ghidra_10.0
(Closes #2976)
 2021-06-09 11:02:41 -04:00
ghidorahrex
a2929e0568 Implemented all combinations of 66/67/REX.W prefixes for CALLF instruction in 64-bit. 
Additional CALLF changes
More aggressive changes for x86-64 CALL/RET instructions
Fixed x86-64 call/ret instructions with prefix 67 overrides
 2021-06-09 10:22:08 -04:00
VGKintsugi
89f6e9bb7d SuperH: Additional delay slot bug fixes 
Review of all delay slot instructions.
 2021-06-03 11:39:01 -04:00
ghidra1
f2fc55554a Merge remote-tracking branch 
'origin/GP-982_ghidorahrex_x86_rdmsr--SQUASHED' into Ghidra_10.0 (Closes
#3046)
 2021-06-03 10:54:29 -04:00
ghidra1
0a8db1e0ad Merge remote-tracking branch 'origin/GP-647_ghidorahrex_pic24_return_instructions' into Ghidra_10.0 2021-06-01 10:02:10 -04:00
ghidorahrex
f7e6f77032 Corrected RDMSR instruction p-code for 64-bit. 2021-05-28 08:47:50 -04:00
ghidorahrex
c9634dd808 Fixed correct SRL byte to grab from tmp 2021-05-21 10:44:29 -04:00
ghidorahrex
38a38056e8 removed @if NEVER blocks from PIC24.sinc 2021-05-21 10:40:38 -04:00
ghidra1
568b264bbb Merge remote-tracking branch 
'origin/GP-220_James_addrsize_bit64--SQUASHED' (Closes #2297, Closes
#2286)
 2021-05-19 22:28:05 -04:00
James
6661f9ab1f GP-220 Fixed various issues pertaining to x86 instruction prefixes. 2021-05-19 22:25:20 -04:00
ghidra1
39a609e24b Merge remote-tracking branch 
'origin/GP-937_ghidorahrex_PR-3008_bobataylor_hcs12_fix_idx1' (Closes
#3008)
 2021-05-19 15:32:49 -04:00
ghidra1
fe0b081973 Merge remote-tracking branch 
'origin/GP-939_ghidorahrex_PR-2970_bobataylor_v850_fix_mul_simm' (Closes
#2970)
 2021-05-19 15:18:04 -04:00
ghidra1
e21149816c Merge remote-tracking branch 
'origin/GP-753_ghidorahrex_PR-2864_VGKintsugi_superh_div1_fix--SQUASHED'
(Closes #2864)
 2021-05-18 09:53:31 -04:00
ghidra1
d44c91e906 Merge remote-tracking branch 'origin/GP-920_ghidorahrex_HCS12_PPAGE' 
(Closes #1099)
 2021-05-18 08:57:32 -04:00
VGKintsugi
fc91a10673 SuperH: Additional delay slot bug fixes 
Review of all delay slot instructions.
SuperH: Delay slot fix for bf/s and and bt/s
Code now caches the value of the $(T_FLAG) before executing the delay slot. Previously the instruction executed in delay slot could potentially change the value of $(T_FLAG) and thereby resulting in incorrect behavior. Credit to Slinga and Waterfuell from SegaXtreme for reporting the issue.
 2021-05-17 15:49:53 -04:00
Ryan Kurtz
3a0ae8ee39 GP-849: Gradle 7 support 2021-05-12 13:45:16 -04:00
ghidra1
65e4c704ec Merge remote-tracking branch 'origin/GP-932_ghidra1_isDynamicallySized' 2021-05-12 11:02:02 -04:00
ghidra1
44d8733f8c GP-928 corrected missing operand for SPARC WR instruction 2021-05-12 09:09:15 -04:00
ghidra1
b5160b253c GP-932 renamed and corrected improper implementation and use of the 
Datatype.isDynamicallySized method
 2021-05-12 08:22:00 -04:00
ghidra1
29926d28d7 Merge branch 'GP-928_ghidra1_Sparc_ASR_read_write' 2021-05-10 20:56:42 -04:00
ghidra1
c45470893b Merge remote-tracking branch 'origin/GP-881_ghidorahrex_arm_thumb_sbit' 2021-05-10 20:51:43 -04:00
ghidra1
e9753ebceb Merge remote-tracking branch 
'origin/GP-841_ghidorahrex_pic16_missing_instructions--SQUASHED'

Conflicts:
	Ghidra/Processors/PIC/data/languages/pic16_instructions.sinc
 2021-05-10 20:45:41 -04:00
ghidorahrex
1e109f9474 Added Z flag updates for shift instructions. 
Added missing PIC16 instructions
 2021-05-10 10:30:10 -04:00
Ryan Kurtz
c2f60b15d3 GP-700: Improved support for Mach-O MH_OBJECT files 2021-05-10 08:20:30 -04:00
ghidra1
da800b6e41 GP-862 Refactor of Composite interface and internals. Changes made to 
packing and alignment methods (see WhatsNew.html for API changes).
 2021-05-07 20:56:35 -04:00
ghidra1
517c3d8f0c GP-928 SPARC language changes. Resolved FPSR duplicate reg name and 
cleaned-up ASR read write instructions.
 2021-05-06 13:21:46 -04:00
ghidra1
3b867b3444 Merge remote-tracking branch 'origin/GP-653_caheckman_UserDefinedCspec' 2021-05-06 12:41:24 -04:00
Cameron Taylor
3a8b4bd639
HCS12: Fix IDX1 addressing with negative immediate 2021-05-05 20:19:04 -04:00
ghidra1
f7b2d49468 Corrected various language errors (PPC, SPARC, MCS96) 2021-05-04 23:24:56 -04:00
caheckman
a5d4ca3cab Program specific, user-defined, cspec extensions 
Documentation for spec extensions

Handle extensions with parse errors
Export button for spec extensions
Pop-up dialog for parse errors in user-defined specification extensions
GP-653 corrected some minor issues and established new ProgramDB version
make incremental initialization constructor for AddressSized private
Make AddressSized fields private
More adjustments to AddressSized
Review fixes for BasicCompilerSpec
Take restoreXml out of DataOrganization interface
Remove restoreXml from BitFieldPacking interface
More review fixes
Prevent callotherfixup extension with non-existent target
Suggested export name
More documentation for SpecExtension
Support for undo/redo with spec extensions
Documentation for ConstructTpl
Split out ProgramCompilerSpec and other changes for review
Changes after next round of reviews
 2021-05-04 12:11:55 -04:00
ghidorahrex
b7a6607464 Fixed issue with PPAGE register not being properly restored afer CALL 
instructions in HCS12
 2021-05-04 11:52:52 -04:00
ghidra1
a34644abdc Merge branch 'GP-901_ghidra1_RegisterAlias' (Closes #2956) 2021-04-30 19:42:04 -04:00
ghidra1
774f5c345a Merge branch 'GP-902_ghidra1_ElfAbsoluteSymbols' 2021-04-30 19:41:15 -04:00
ghidra1
0a85fb1984 GP-902 Modified treatment of ELF Symbols which refer to SHN_UNDEF (0) or 
SHN_ABS (0xfff1) section index values.
 2021-04-30 11:34:40 -04:00
ghidra1
a40370ab7a Revert "Merge remote-tracking branch 'origin/GP-653_UserDefinedCspec--SQUASHED'" 2021-04-30 10:34:54 -04:00
ghidra1
b7499e1bc1 Merge remote-tracking branch 'origin/GT-3668_ghidorahrex_ppc_vle_simm20' 2021-04-29 17:08:23 -04:00
caheckman
ed82c2cb34 GP-653 added support for user-defined compiler spec extensions 2021-04-29 16:17:25 -04:00
ghidra1
8f9b067384 GP-901 added regiater alias support and defined WREG aliases for PIC24 
variants
 2021-04-28 16:04:03 -04:00
ghidra1
74a580191e GP-906 corrected alignment of PIC24 allocated external symbol during ELF 
import
 2021-04-28 16:01:34 -04:00
ghidorahrex
0b7a00e10b Addex 's' suffix for ARM thumb instructions which modify status flags. 2021-04-23 14:21:27 -04:00
ghidra1
a9a6ecd56c Merge remote-tracking branch 
'origin/GP-800_ghidorahrex_x86_64_address_mode_fix' (Closes #2504)
 2021-04-23 11:40:50 -04:00
ghidra1
2c5ecf12d0 Merge remote-tracking branch 'origin/GP-837_ghidorahrex_PR-1163_toshipiazza_x86-sleigh-jcc' 2021-04-23 11:23:31 -04:00
Cameron Taylor
c8322ba9e7
V850: Fixed multiply by immediate 
Multiply by immediate (mul imm9, reg2, reg3) used a signed token for the lower 5 bits of the immediate value imm9.
This resulted in any immediate value in which the 5th bit was set to be calculated incorrectly.

imm9 = 0x18 ( 0b000011000 )
OLD:    f8 0f 40 52        mul    -0x8, r1, r10
NEW:   f8 0f 40 52        mul    0x18, r1, r10

imm9 = -0xF0 ( 0b100010000 )
OLD:    f0 0f 60 52        mul    -0x10, r1, r10
NEW:   f0 0f 60 52        mul    -0xf0, r1, r10
 2021-04-22 20:50:11 -04:00