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Code Issues Releases Wiki Activity
1038 commits 3 branches 48 tags 436 MiB
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120 commits

Author SHA1 Message Date
Ryan Kurtz
9f96140f55 Merge remote-tracking branch 'origin/GT-3094_ghidorahrex_PR-867_fortenbt_864-fix-6502-default-memory-blocks' 2019-08-20 14:27:15 -04:00
Ryan Kurtz
ee61c15a46 Merge remote-tracking branch 'origin/GT-3092_ghidorahrex_PR-834_mumbel_x86.offset' 2019-08-20 14:16:46 -04:00
Ryan Kurtz
e9f542f4f2 Merge remote-tracking branch 
'origin/GT-3091_ghidorahrex_PR-665_mh-_fix_pic16_w_vs_wreg'
 2019-08-20 13:24:36 -04:00
Ryan Kurtz
feae9777e8 Merge remote-tracking branch 'remotes/origin/GT-2955_emteere_PR-881_mumbel_simm32' 2019-08-15 07:43:02 -04:00
emteere
522662477e GT-2955 (closes #881): Certifying 
Pulled-from: mumbel <22204578+mumbel@users.noreply.github.com>
 2019-08-14 18:28:21 -04:00
Ryan Kurtz
8caa0b0f4c Merge remote-tracking branch 'origin/James_GT-3075' 2019-08-14 07:47:02 -04:00
James
f39c19e0eb GT-3075 added userops to toy language 2019-08-12 12:34:13 -04:00
ghidorahrex
b4096d1061 Fixed build errors in PIC-30 (Fixes #897) 2019-08-12 08:21:22 -04:00
Ryan Kurtz
8f3f5c18f5 Merge remote-tracking branch 'origin/GT-3008_ghidorahrex_PIC-30_division_instructions' 2019-08-09 13:50:31 -04:00
fortenbt
c992585957 Remove IO default memory block from 6502 pspec 
- Corrects the length of the zero page and stack memory blocks.
 2019-08-07 12:03:36 -04:00
mumbel
88f127566c Sign-extended imm32 for 64-bit mode 
Several x86_64 instructions were not sign extending the imm32 to
64-bits for the 64-bit mode instruction:  ADD, AND, CMD, and SUB,
while: ADC, MOV, and TEST were correct
 2019-08-06 17:40:53 -05:00
ghidorahrex
6a75b66995 PIC 30 code review fixes. Changed "repeat 0x12" to "repeat 0x11". 
Modified plain division instructions to use pcodeops since we can't
implement the normal instructions.
 2019-08-06 12:02:13 -04:00
Ryan Kurtz
15ee804009 Merge remote-tracking branch 'origin/GT-3058_emteere_PR-638_zeldin_8048' 2019-08-02 15:29:45 -04:00
emteere
3d9525985b GT-3058: Constrained matching so that order of instruction definitions 
don't matter.

Pulled-from: Marcus Comstedt <marcus@mc.pp.se>
 2019-08-02 15:19:40 -04:00
emteere
2221510f90 emteere Minor changes for sleigh editor syntax errors 2019-08-02 12:04:47 -04:00
Ryan Kurtz
64e83b1d93 Merge remote-tracking branch 'origin/GT-3041_emteere_PR-567_mumbel_tricore' 2019-08-02 11:34:38 -04:00
emteere
0a517e6864 GT-3041_emteere Added emulation tests and minor changes to calling 
convention.  Assigning correct return storage will require a separate
change to core Ghidra.

Pulled-from: mumbel <22204578+mumbel@users.noreply.github.com>
 2019-08-02 10:45:33 -04:00
Gareth Edwards
4da786f3f9 6805 definition - fix vendor in sla spec comment 
The 6805 is/was a Motorola architecture, not an Intel one. Fix the comment in the
slaspec file.
 2019-07-26 22:17:34 +01:00
mumbel
6f3fc3c32e x86 consistent offsets 2019-07-24 19:51:04 -05:00
Ryan Kurtz
f33e2c1296 Merge remote-tracking branch 
'origin/GT-3028_ghidorahrex_PR_marpie_Update_MIPS_processor_manuals'

Conflicts:
	Ghidra/Processors/MIPS/data/manuals/mipsMic.idx
 2019-07-23 09:03:50 -04:00
Ryan Kurtz
bb8f35f94d Merge remote-tracking branch 'origin/GT-3027_ghidorahrex_PR_philpem_ARM_TEQP_instruction' 2019-07-23 08:28:55 -04:00
ghidra1
5cde1bd48d GT-3026 - added support for ELF MIPS R_MIPS_GPREL32 relocation and 
corrected local R_MIPS_GPREL16 relocation.
 2019-07-22 17:52:36 -04:00
mumbel
56d427ce50 [tricore] Update gradle for 9.1.x changes 2019-07-19 18:46:11 -05:00
Marcus Comstedt
62d5fa3b9d 8048: Remove the localrange declaration for the stack 2019-07-19 19:38:58 +02:00
Marcus Comstedt
3a8e59319a 8048: Reformat to begin and end each semantic section with NL (unless empty) 2019-07-19 19:38:57 +02:00
Marcus Comstedt
4f6e4bc172 8048: Avoid @ifdef inside a semantic section 2019-07-19 19:38:57 +02:00
Marcus Comstedt
9a1f5e60bf 8048: Avoid use of unquoted # in the display section 2019-07-19 19:38:57 +02:00
Marcus Comstedt
4531aa402f 8048: Avoid use of @define without value 2019-07-19 19:38:56 +02:00
Marcus Comstedt
3dfb8bc974 8048: Avoid use of macro expansion 2019-07-19 19:38:56 +02:00
ghidorahrex
d7877b0353 Updated pcode tests for PIC30 issues. 2019-07-19 13:22:06 -04:00
ghidorahrex
05d9679a3d Added instructions that correctly emulate/model/decompile division for 
the PIC-24 and PIC-30.
 2019-07-19 13:22:05 -04:00
Ryan Kurtz
eba358f1d2 Merge remote-tracking branch 'origin/GT-3018_ghidorahrex_PR-800_mumbel_ARM_vmov_thumb_instruction' 2019-07-19 12:19:49 -04:00
ghidra1
6a6bb63932 Corrected ELF Import issue where FileBytes can not be used in some load 
situations (e.g., PIC-30)
 2019-07-19 10:56:01 -04:00
Philip Pemberton
a8f27f6484 TRAPV/TRAPcc don't use the TRAP7 vector, they use the TRAPV vector 2019-07-18 08:54:54 -04:00
Philip Pemberton
919762c1cc Prefix trap(), make parameter the trap number 
* Add "__m68k_" prefix to `trap()` to indicate that it's a CPU
    intrinsic
  * `__m68k_trap()` now takes the trap number as a parameter, which
    lines up better with established 68k norms (`TRAP #n` is the
    assembly syntax)
 2019-07-18 08:54:28 -04:00
Philip Pemberton
f127c3c0fc M68000: set alignment, full SR decode, TRAPV as address 
* Specify instruction alignment to be 2 bytes
  * Fully decode the status register (add trace and supervisor flags and interrupt priority)
  * Decode TRAPs into the vector addresses to make code easier to follow
 2019-07-18 08:54:09 -04:00
Ryan Kurtz
674d5cee53 Merge remote-tracking branch 'origin/GT-3015_ryanmkurtz_PR-756_Piruzzolo_AAM' 2019-07-18 08:48:30 -04:00
emteere
a842f89e6e GT-2907_emteere Fixed correct setting of CF for lsl.b, lsl.w, asl.b, 
asl.w
 2019-07-18 08:29:29 -04:00
mumbel
7fc76dbca4 [tricore] TRICORE processor module 2019-07-17 18:00:12 -05:00
ghidra1
e565601299 Merge remote-tracking branch 'origin/ghidra1_BitFields' 2019-07-17 18:45:27 -04:00
mumbel
5521906393 vmov instruction was using wrong varaible to allow for THUMB 
and ARM resulting in the wrong register being attached/selected.

The U bit was also flipped `unsigned = (U == '1');`
unsigned now has bit set and signed is unset
 2019-07-17 17:28:53 -05:00
Ryan Kurtz
c8e117736c Merge remote-tracking branch 'origin/GT-3011_ghidorahrex_PR-659_roblabla_AARCH64_volatile_system_registers' 2019-07-17 14:35:32 -04:00
Ryan Kurtz
305cb0f1cb Merge remote-tracking branch 'origin/GT-3009_ghidorahrex_PR-724_pmnxis_AARCH64_index' 2019-07-17 12:41:29 -04:00
ghidorahrex
b61f8c29ff GT-3009: Accepting pull request 
Pulled-from: pmnxis <pmnxis@users.noreply.github.com>
 2019-07-17 12:37:14 -04:00
Ryan Kurtz
a4f7cdc414 Merge remote-tracking branch 'origin/GT-2940_GhidorahRex_PR_Support_for_RD_WR_FS_GS_BASE' 2019-07-17 12:33:49 -04:00
ghidra1
a7345527c9 BitFields - added preliminary support for composite bitfields 2019-07-17 11:55:29 -04:00
mumbel
f36d7a29da prime 1E, OCTEON/DSP, and cleanup 
- The EVA instructions have prime=0x1E, this should be 0x1F. These
  instructions are used to access user mode virtual address from
  kernel mode, so probably not used often.

- General cleanup in the bit pattern.  There was mixed used of
  decimal and hex values for the same token, converted >9 to hex

- Added OCTEON instructions: lbx, blux, ldx, lhx, lhux, lwx, and lwux

- Implemented the multiple accumulator found in DSP for:
  madd, maddu, mfhi, mflo, msub, msubu, mthi, mtlo, mult, and multu

  These changes convert '00' to ac in the bit pattern and attach to
  the original lo/hi pair and now lo1/hi1, lo2/hi2, and lo3/hi3 pairs.
  The value of ac can range from 0 to 3.  When ac=0, this refers to
  the original HI/LO register pair of the architecture.

- some minor whitespace cleanup
 2019-07-17 10:59:37 -04:00
Ryan Kurtz
7a696dd6c2 Merge remote-tracking branch 'origin/GT-3007_ryanmkurtz_PR-719_williballenthin_patterncontraints' 2019-07-17 09:21:43 -04:00
Ryan Kurtz
c6f0bbc614 Merge remote-tracking branch 'origin/GT-3006_ryanmkurtz_PR-671_marpie_implement_callfixup_chkstk' 2019-07-17 09:01:23 -04:00
Ryan Kurtz
a4b9304cd8 Merge remote-tracking branch 'origin/GT-3004_ryanmkurtz_PR-771_GregoryMorse_x86_16_ida' 2019-07-17 08:19:50 -04:00