15 commits

Author	SHA1	Message	Date
David Youd	2d497a0d5c	fix to TSX instruction	2023-05-31 13:14:48 +00:00
emteere	5b0d7f3ff3	GP-2701 syntax missing in 6502 indirect JMP	2022-10-14 20:40:05 +00:00
Ryan Kurtz	183a487363	GP-0: Fixing typo in 6502.slaspec (Closes #4601)	2022-09-17 02:27:28 -04:00
Alessandro Gatti	7ee81b3e76	Fix 6502 PLP opcode.	2022-05-16 07:26:41 +02:00
ghidra1	ab05672653	Merge remote-tracking branch 'origin/GP-1115_ghidorahrex_PR-3095_agatti_6502-bit-instruction-fix' into Ghidra_10.1	2021-11-30 08:13:51 -05:00
ghidra1	b5b4f94eed	Merge remote-tracking branch 'origin/patch' ... Conflicts: Ghidra/Features/Decompiler/certification.manifest	2021-09-08 23:22:35 -04:00
Philip Pemberton	84492a89d6	GP-1109 Fix 6502 SBC carry handling (Closes #3190, Closes #3189)	2021-09-08 11:51:08 -04:00
Alessandro Gatti	843a5c2261	Update 6502 flags handling.	2021-06-02 16:34:00 +02:00
Alessandro Gatti	d588033a56	Fix BIT instruction description. ... Flag handling for the BIT instruction did not follow the datasheet. This fixes #2558.	2021-06-02 15:56:32 +02:00
Bastien Bouclet	fe90271558	Fix the carry flag value for the CMP, CPX and CPY 6502 instructions ... The CPU manual states "the carry flag is set when the value in memory is less than or equal to the accumulator, reset when it is greater than the accumulator".	2020-07-12 14:16:57 +02:00
Alessandro Gatti	1d82dccbd2	Call the IRQ vector this time.	2019-12-07 00:36:09 +01:00
Alessandro Gatti	8ce6d9c227	Properly model 6502's BRK opcode.	2019-09-24 02:44:28 +02:00
Alessandro Gatti	48150b1870	Use proper bit index for 6502 Interrupt flag.	2019-04-19 17:04:28 +02:00
emteere	008cf415b2	GT-2759 Fixed 6502 processor module Zero Page indexed addressing.	2019-04-15 16:42:57 -04:00
Dan	79d8f164f8	Candidate release of source code.	2019-03-26 13:46:51 -04:00