Commit graph

172 commits

Author SHA1 Message Date
ghidorahrex
0b7a00e10b Addex 's' suffix for ARM thumb instructions which modify status flags. 2021-04-23 14:21:27 -04:00
ghidra1
74ef9b86c7 Merge remote-tracking branch
'origin/GP-761_ghidorahrex_PR-2451_JeffmeisterJ_fix_arm_crn1_coproc_regs'
(Closes #2451)
2021-03-17 19:22:47 -04:00
Hyunjin Song
6d97ccee64
Fix ARM Neon VMRS instruction for little endian 2021-02-12 13:50:37 +09:00
emteere
5338bb74b7 GP-627_emteere Added missing VMUL F16 variants 2021-01-26 12:09:43 -05:00
Hyunjin Song
6e7239f43a Fix some ARM NEON vmul opcodes 2021-01-26 12:09:21 -05:00
reedmideke
e51639b095 Fix #2559 by removing invalid variant of vst4 2020-12-29 12:05:50 -05:00
ghidra1
5bffb5c6ed Merge remote-tracking branch 'origin/GP-389_ArmSwitchFixup' into patch 2020-12-14 12:35:04 -05:00
ghidra1
9832f58435 GP-512 corrected ARM 8-byte return storage in cspecs 2020-12-14 10:20:24 -05:00
ghidra1
64e0ef10d7 GT-3657 corrected ARM pcodeop spelling of
coproc_moveto_Identification_registers
2020-12-08 14:21:39 -05:00
caheckman
1f443a15b4 Fix to ARM switch function fixups 2020-11-13 17:15:11 -05:00
Jeffrey
6b145561d1 Changed Non-Secure to NonSecure, because the dash breaks the build 2020-11-12 01:46:25 +01:00
Jeffrey
823887cf89 Added missing CRn == c1, op1 == 0 coproc registers 2020-11-12 01:21:30 +01:00
Jeffrey
865b156b08 Fixed ARM coproc regs for CRn == c1 2020-11-12 01:21:03 +01:00
emteere
42b8eb3096 GT-3394_emteere fix for wrong store/load register list in Thumb mode for
VLDMIA/VSTMIA instructions
2020-10-02 15:24:00 -04:00
ghidra1
39ef49d1d1 Merge remote-tracking branch 'origin/GP-49_external_disassembly_upgrade--SQUASHED' into Ghidra_9.2 2020-09-29 10:23:16 -04:00
ghidra1
356ea446c7 GP-49 external disassembly field can now switch based upon context (implemented for ARM/Thumb) 2020-09-29 10:22:46 -04:00
ghidra1
558844aaa9 Merge remote-tracking branch 'origin/GT-3643_ghidorahrex_arm_ldrt_bitpattern' 2020-09-22 10:26:00 -04:00
emteere
a7d5e983b7 GT_3394_emteere minor fix for Arm v6 with VFPv2 but not VFPv3. Fix
subconstructor matching for reg d0
2020-09-21 21:20:00 -04:00
emteere
9e0c6b9372 GT-3394 Fixing UDF instruction flow 2020-09-17 21:28:41 -04:00
ghidorahrex
3778831902 GT-3394: Created ARM v6 pspec 2020-09-17 21:28:40 -04:00
ghidorahrex
ea6cfcd08c Revert "GT-3394: Fixed register definitions in VLDM/VSTM instructions"
This reverts commit 0858a9140d0f7c9c7e1f2e412d3c19a6087e5d1e.
2020-09-17 21:28:39 -04:00
ghidorahrex
cfcfff0afc GT-3394: Fixed register definitions in VLDM/VSTM instructions 2020-09-17 21:25:50 -04:00
ghidorahrex
389387c9d3 GT-3394: Fixed ARM instruction issues
- Added missing THUMB instruction variants
- Corrected VFPv2/VFPv3/SIMD errors
2020-09-17 21:21:43 -04:00
emteere
ad96867b74 GT-2567 fixed vldm*/vstm* semantics 2020-09-16 21:30:12 -04:00
emteere
82f58c22d2 GT-2567 adding missing neon instructions, correcting shift calculation
of several neon instructions, upping version number due to
sub-constructor split
2020-09-14 21:35:34 -04:00
emteere
93473d3282 GT-2567 fixed long standing issue with pointer source register 2020-09-14 20:50:39 -04:00
ghidorahrex
169b23b1e0 GT-2567: implemented vstmia/db and vldmia/db ARM neon instructions 2020-09-14 20:50:38 -04:00
ghidra1
04594f770b Merge remote-tracking branch 'origin/GP-68_James_arm_thumb_fixes' 2020-09-11 19:45:35 -04:00
James
5e40f00351 arm fixes 2020-09-01 21:21:29 -04:00
James
31a377b6d0 fixing ARMTHUMBinstructions.sinc 2020-08-25 09:42:47 -04:00
ghidorahrex
16e98bfea6 GT-3643: Corrected ARM ldrt instruction bit-pattern 2020-07-16 10:55:58 -04:00
WorksButNotTested
b3b7bab4ca Added secondary selectors to ARM opinion file for correctly identifying
ARMBE8 binaries
2020-07-14 16:12:02 -04:00
ghidorahrex
cde035d8b2 Merge remote-tracking branch
'origin/GT-3641_ghidorahrex_PR-2005_simeonpilgrim_arm_STREX_fix'

Fixes #2005, fixes #2010
2020-07-14 14:27:43 -04:00
ghidorahrex
c5a31bb129 Merge remote-tracking branch
'origin/GP-23_ghidorahrex_PR-1802_vvasseur_fix_teq_in_arm_thumb'

Fixes #1802
2020-06-30 15:07:29 -04:00
Simeon Pilgrim
632a768cf3 copy hasExclusiveAccess pattern into ARM STREX instruction to be the same as the THUMB and STREXn instructions 2020-06-19 09:38:04 +12:00
emteere
44037991d2 GT-3393_ghidorahrex_ARM_missing_spaces minor format issue in ARMThumb
from GT-3393 changes
2020-05-11 17:08:54 -04:00
Valentin Vasseur
eed394f8a3 ARM: Fix sleigh description of teq in Thumb mode
teq performs a bitwise EXCLUSIVE or, not an inclusive or. (See section
A8.8.238 of the ARMv7 reference manual.)
2020-04-26 01:52:01 +02:00
ghidorahrex
0ec0e703b3 Merge remote-tracking branch 'origin/GT-3393_ghidorahrex_ARM_missing_spaces' 2020-02-24 13:58:56 -05:00
ghidorahrex
2d69b43bd1 GT-3393: Fixed formatting for Ldlist in arm thumb 2020-02-12 07:36:18 -05:00
Benjamin Levy
74fae2f644 Merge branch 'master' of
https://github.com/NationalSecurityAgency/ghidra into spell
2020-01-29 11:37:23 -05:00
ghidorahrex
498abf1a31 Merge remote-tracking branch 'origin/GT-3420_ghidorahrex_arm_thumb_rsb'
Fixes #1365
2020-01-27 07:20:35 -05:00
ghidorahrex
5ff5426ffc Merge remote-tracking branch 'origin/GT-3408_ghidorahrex_arm_thumb_it_al_condition' 2020-01-27 07:17:57 -05:00
Benjamin Levy
a5efecea84 Fix spelling errors 2020-01-26 22:39:18 -05:00
mumbel
dce6e9f6a8 Cleaning up warnings and errors, mostly looking for:
temporary is written but not read in constructor
2020-01-22 19:51:45 -06:00
ghidorahrex
f92528923d GT-3408: Corrected IT conditionals 2019-12-20 11:32:48 -05:00
ghidorahrex
7aa51fb572 GT-3420: Corrected RSB width modifier 2019-12-20 08:45:25 -05:00
ghidorahrex
d47317a9f8 GT-3408: Included support of 'al' for IT instructions, generalized
support for IT instructions and included the 'nv' condition although it
should never occur.
2019-12-18 14:41:05 -05:00
ghidra1
8fbdec4eca Merge remote-tracking branch 'origin/patch' 2019-12-18 11:02:47 -05:00
emteere
67d774fa42 GT-3374_emteere several bugs and inneficiencies causing analysis to fail
for programs with debug info
2019-12-16 16:52:15 -05:00
ghidorahrex
d30ba7c9b1 GT-3393 ARM parameter list spaces
Corrected ARM subconstructors for spacing around register paramter
lists.
2019-12-13 09:35:08 -05:00