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14607 commits 3 branches 48 tags 430 MiB
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50 commits

Author SHA1 Message Date
Ryan Kurtz
e57bf92a20 Merge remote-tracking branch 
'origin/GP-5131_ghidorahrex_MIPS16e_jump_delayslot_fix' into patch
(Closes #862)
 2025-04-11 09:22:01 -04:00
Dan
7dd417b6be GP-5051: Distinct qemu-system launcher. 2024-12-04 08:43:26 -05:00
ghidorahrex
96c1ec0970 GP-5131: Fixed MIPS16e instruction delayslot relative addressing 2024-11-15 16:14:12 +00:00
emteere
325358ec0c GP-4939 Added missing mips opinion for R3/4 n32 automatic processor 
identification during import.
 2024-09-18 16:10:07 -04:00
caheckman
05818c5c3a GP-4370 Internal Storage 2024-05-02 15:13:32 +00:00
Ryan Kurtz
211e15bef5 Merge remote-tracking branch 'origin/patch' 2024-03-20 13:16:06 -04:00
mumbel
83b45b995c MIPS patterns 
sync possible function start with function start
correct bit pattern for all bits in instr_index
 2024-03-20 13:11:20 -04:00
Dan
289c5c90fa GP-3838: Add qemu+gdb launcher. 2024-03-01 12:36:13 -05:00
James
ea7dedde14 GP-3875 fixed mips ei and di handling of zero register 2023-12-11 19:16:46 +00:00
emteere
78bbf89075 GP-3948 MIPS TEQ zero,zero changed to trap always 2023-11-30 00:52:36 +00:00
roblabla
80d92aa32f GP-0: Remove executable bit on various non-executable files 
(Closes #5943)
 2023-11-20 08:57:02 -05:00
Dan
647b4a42ac GP-3453: Add mips:3000 to mips.ldefs 2023-08-09 14:27:04 -04:00
Ryan Kurtz
23597c71d6 Merge remote-tracking branch 
'origin/GP-2748_James_elf_process_entry--SQUASHED' (Closes #4667)
 2023-04-04 08:25:27 -04:00
James
6258dd9eee GP-2748 added calling convention for elf entry point 2023-04-03 15:35:27 +00:00
Pokechu22
14880b53c4 Create and use LZCOUNT Pcode op 2023-03-02 18:30:04 -08:00
Ryan Kurtz
2041bd8f10 Merge remote-tracking branch 
'origin/GP-2775_ghidorahrex_mips_mt_dsp--SQUASHED' (Closes #4526)
 2023-02-18 07:53:30 -05:00
ghidorahrex
d720d01dd8 GP-2775: Added MIPS MT and MIPS DSP modules 2023-02-17 16:41:32 -05:00
emteere
93c291ba72 GP-2905: Fixed regression in handling of spacebase register values that 
cause a stack trace in the decompiler for RISCV.  Removed unnecessary
spacebase settings in tricore, mips, riscv.
 2023-02-07 10:51:56 -05:00
emteere
ba96e7841e GP-2734 added opinions for MIPS EABI and missing o32, n32, o64 2022-10-27 17:44:32 -04:00
James
5796680f12 GP-2734 adjusted mips eabi cspecs 2022-10-27 17:44:31 -04:00
Luke Craig
b590646a3b change offset stack in le to 0 2022-10-27 17:44:29 -04:00
Luke Craig
31e2875bd5 added support for MIPS 32 eabi 2022-10-27 17:44:28 -04:00
ghidorahrex
8e2a52b756 GP-2162 fixed zero register reads in mipsmicro and mips16 2022-10-14 10:47:05 -04:00
dev747368
8b924f718e GP-2435 fix exception in QueryOptionService if secondary isn't an intstr 2022-08-08 21:36:10 +00:00
ghidra1
6614ea5c2e GP-0 minor fixes for build 2022-07-26 13:56:39 -04:00
ghidra1
062551ae9a GP-2366 handle MIPS emulation when ISA_VARIANT not enabled 2022-07-25 16:25:30 -04:00
ghidorahrex
a7e2162d2b GP-1879 corrected MIPS rdhwr instruction registers 2022-04-20 12:48:09 -04:00
Ryan Kurtz
569cbc61fc Merge remote-tracking branch 'origin/patch' 2021-10-20 12:02:29 -04:00
Ryan Kurtz
33aee0ff63 Merge remote-tracking branch 
'origin/GP-1290_ghidorahrex_PR-3405_kotcrab_fix-mips-ins' (Closes #3405)
 2021-10-14 08:34:33 -04:00
ghidorahrex
6037ba86d3 Corrected MIPS tlbr pcodeop 2021-10-04 10:29:24 -04:00
ghidra1
3a23b73886 Merge remote-tracking branch 'origin/patch' 2021-09-28 11:50:05 -04:00
ghidorahrex
37f858aafd Fixed issue with MIPS64 DINS and related instructions. 2021-09-27 09:37:43 -04:00
kotcrab
3ad11a8a36 Fix decompilation of MIPS ins instruction 
Simplify ext instruction
 2021-09-24 19:06:11 +02:00
ghidorahrex
7321e2a09a Fixed MIPS bitpattern endian mixup 2021-09-17 12:03:14 -04:00
Nicolas Iooss
8194ee34ec fix(mips32el): fix positions of float registers in Little-Endian MIPS32 CPU 
When loading double constants using two lwc1 instructions ("Load Word in
Coprocessor 1"), the words are swapped on Little-Endian MIPS machines.

More precisely, when compiling the following function with
mipsel-linux-gnu-gcc -O3 -mfp32 -march=mips1

    double add_0x100000000(double num) {
        return num + 4294967296.0;
    }

The produced assembly (seen with objdump) is:

    00000000 <add_0x100000000>:
       0:    3c1c0000     lui   gp,0x0
       4:    279c0000     addiu gp,gp,0
       8:    0399e021     addu  gp,gp,t9
       c:    8f820000     lw    v0,0(gp)
      10:    00000000     nop
      14:    c4400000     lwc1  $f0,0(v0)     ; load the first 32-bit word
      18:    00000000     nop
      1c:    c4410004     lwc1  $f1,4(v0)     ; load the second 32-bit word
      20:    03e00008     jr    ra
      24:    46206000     add.d $f0,$f12,$f0  ; perform the addition

(the rodata section contains "00000000 0000f041" to encode the constant).

When opening the produced file with Ghidra 10.0, the assembly code is
fine but the decompiler outputs:

    double add_0x100000000(double param_1)
    {
      return param_1 + 5.465589744795806e-315;
    }

5.465589744795806e-315 comes from the decoding of "0000f041 00000000"
instead of "00000000 0000f041": the words were swapped.

Fix this by swapping f0 and f1, f2 and f3... when using a Little-Endian
MIPS machine with 32-bit floating-point registers.
 2021-07-12 21:06:44 +02:00
veritas501
89ecfcc236 fix(mips32r6): Optimize inst jic 2021-05-12 15:02:15 +08:00
veritas501
e606a9a18f fix(mips32r6): jic is not call but jump 
See https://s3-eu-west-1.amazonaws.com/downloads-mips/documents/MD00086-2B-MIPS32BIS-AFP-6.06.pdf,
page 205 (page 215 in file).
jic is not like jialc, which set ra by `GPR[31] <- PC + 4`, it's just a jump.
So, if meet jic reg,xxx , identify it as a jump.
If meet jic ra,xxx , identify it as a return.
 2021-05-11 13:13:07 +08:00
caheckman
872cd724cb Split out BE and LE cspec for MIPS 2021-03-24 13:23:04 -04:00
ghidra1
32ae57e312 Merge remote-tracking branch 
'origin/GP-33_emteere_PR-1766_mumbel_mips-rfe' into patch
 2021-01-25 15:45:45 -05:00
emteere
d7a1085619 GP-33_emteere Updated comment, read Status reg only once 2021-01-25 15:21:47 -05:00
mumbel
734c945f6d MIPS missing rfe instruction 2020-04-13 15:30:21 -05:00
ghidorahrex
02319781b6 GT-3466 Fixed export of local variables as constants 2020-02-07 12:07:26 -05:00
mumbel
dce6e9f6a8 Cleaning up warnings and errors, mostly looking for: 
temporary is written but not read in constructor
 2020-01-22 19:51:45 -06:00
Ryan Kurtz
f33e2c1296 Merge remote-tracking branch 
'origin/GT-3028_ghidorahrex_PR_marpie_Update_MIPS_processor_manuals'

Conflicts:
	Ghidra/Processors/MIPS/data/manuals/mipsMic.idx
 2019-07-23 09:03:50 -04:00
ghidra1
a7345527c9 BitFields - added preliminary support for composite bitfields 2019-07-17 11:55:29 -04:00
mumbel
f36d7a29da prime 1E, OCTEON/DSP, and cleanup 
- The EVA instructions have prime=0x1E, this should be 0x1F. These
  instructions are used to access user mode virtual address from
  kernel mode, so probably not used often.

- General cleanup in the bit pattern.  There was mixed used of
  decimal and hex values for the same token, converted >9 to hex

- Added OCTEON instructions: lbx, blux, ldx, lhx, lhux, lwx, and lwux

- Implemented the multiple accumulator found in DSP for:
  madd, maddu, mfhi, mflo, msub, msubu, mthi, mtlo, mult, and multu

  These changes convert '00' to ac in the bit pattern and attach to
  the original lo/hi pair and now lo1/hi1, lo2/hi2, and lo3/hi3 pairs.
  The value of ac can range from 0 to 3.  When ac=0, this refers to
  the original HI/LO register pair of the architecture.

- some minor whitespace cleanup
 2019-07-17 10:59:37 -04:00
Markus Piéton
508c9a7ea0 Updating MIPS Processor Manuals to latest version. 
* MIPS Architecture For Programmers Volume II-A:
      MD00087-2B-MIPS64BIS-AFP-6.06.pdf
  * MIPS Architecture for Programmers Volume II-B: microMIPS64
      MD00594-2B-microMIPS64-AFP-6.05.pdf
  * MIPS Architecture for Programmers Volume II-B: microMIPS32
      MIPS_Architecture_microMIPS32_InstructionSet_AFP_P_MD00582_06.04.pdf

Document Source:

  * https://s3-eu-west-1.amazonaws.com/downloads-mips/documents/MD00087-2B-MIPS64BIS-AFP-6.06.pdf
  * https://s3-eu-west-1.amazonaws.com/downloads-mips/documents/MD00594-2B-microMIPS64-AFP-6.05.pdf
  * https://s3-eu-west-1.amazonaws.com/downloads-mips/documents/MIPS_Architecture_microMIPS32_InstructionSet_AFP_P_MD00582_06.04.pdf
 2019-05-11 11:45:05 +02:00
ghidorahrex
bc6f6ad927 GT-2768: Corrected spelling and index for mips reference manual. 2019-04-16 14:03:16 -04:00
ghidra1
7179c6de81 GT-2667 added support for generating sleigh build.xml files 2019-03-29 17:24:31 -04:00
Dan
79d8f164f8 Candidate release of source code. 2019-03-26 13:46:51 -04:00