emteere
7a13061e4a
GP-10_emteere adding missing get_pc_thunk.as/si
2020-05-22 15:39:00 -04:00
heinrich5991
a3b65be841
Autodetect the ___chkstk_ms symbol
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Fixes #1888 .
2020-05-21 01:07:08 +02:00
caheckman
b3bd637d99
Filling in some vector instructions that were causing "Overlapping input
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varnodes"
2020-05-12 14:08:31 -04:00
ghidorahrex
0b5abaa7a7
Merge remote-tracking branch
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'origin/GT-3613_ghidorahrex_PR-1662_SamB_patch-1'
Fixes #1662
2020-03-24 11:08:51 -04:00
Ryan Kurtz
a5a03f7863
DyldCacheLoader now has an opinion for x86_64, allowing the standard
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macOS DYLD to be loaded.
2020-03-23 13:56:45 -04:00
Samuel Bronson
060a4754cb
Update link in x86-64-win.cspec
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Just when you thought it was safe to link to MS docs ...
2020-03-21 13:00:02 -04:00
ghidorahrex
68898fc5b8
Merge remote-tracking branch 'origin/GT-3576_AllocaProbe'
2020-03-18 13:46:07 -04:00
caheckman
05a773678a
Adjust fixup for 64-bit alloca_probe implementations
2020-03-03 12:29:47 -05:00
ghidorahrex
222b42a76b
GT-3534: Removed AF flag setting in add/sub flags when not being set
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elsewhere
2020-02-11 11:41:27 -05:00
ghidra1
0d641458ce
Merge remote-tracking branch 'origin/patch'
2020-02-05 14:04:07 -05:00
ghidorahrex
4c31ac66ce
GT-3489 Updated x86.idx with latest AMD and Intel instruction set
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manuals
2020-02-05 13:38:11 -05:00
ghidorahrex
292d802ab6
Merge remote-tracking branch 'origin/GT-3413_ghidorahrex_x86_32_rdrand'
2020-01-27 07:18:29 -05:00
ghidorahrex
07e9853b97
Merge remote-tracking branch
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'origin/GT-3425_ghidorahrex_PR-1378_saruman9_fix_push_pop_seg'
Fixes #1378
2020-01-17 12:30:06 -05:00
Ryan Kurtz
2c0d41b554
Merge remote-tracking branch 'origin/GT-3423_ghidorahrex_PR-1370_mumbel_x86_bt'
2019-12-23 10:27:56 -05:00
Ryan Kurtz
03c0872244
Merge remote-tracking branch 'origin/GT-3421_ghidorahrex_PR-872_andyhhp_x86-int'
2019-12-23 08:35:30 -05:00
saruman9
430baa01c6
Fix PUSH and POP instruction for segment registers in x86
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Create macros for push/pop instructions, which operates of segment registers. Add behaviour for
push/pop instructions, which operates of `FS` and `GS` segment registers in 64-bit mode.
For details see p. 1037 (`POP`) and p. 1163 (`PUSH`) of Intel's manual or open `Instruction Info...`
in the Ghidra.
Fix #1377 .
2019-12-22 00:51:22 +03:00
mumbel
eafac1daa1
BT <r64>,<Reg64> used 32 bit instead of 64-bit modulo size
2019-12-20 14:58:10 -06:00
ghidorahrex
c2847fa9a4
GT-3413: Added rdrand/rdseed support to x86-32
2019-12-19 09:42:17 -05:00
Ryan Kurtz
2f1292b174
Merge remote-tracking branch 'origin/caheckman_x86parityflag'
2019-12-17 11:31:26 -05:00
Ryan Kurtz
8170874fe6
Merge remote-tracking branch 'origin/GT-3380_ghidorahrex_PR-1295_roblabla_ptest'
2019-12-09 13:38:21 -05:00
Raphaël Akladios
bbf050a26e
Update the mnemonic to SALC and disallow it in b64
2019-12-03 15:48:01 +01:00
Raphaël Akladios
304e3a56a3
x86: Add the "SETALC" instruction to SLEIGH specs
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The SETALC / SALC instruction is officially undocumented by Intel, and is currently missing form Ghidra.
A constructor for this instruction is added to the SLEIGH specification files according to the descriptions in these links:
http://www.rcollins.org/secrets/opcodes/SALC.html
http://ref.x86asm.net/coder32.html#xD6
2019-12-02 04:52:22 +01:00
roblabla
6549d330f8
x86: Properly implement the PTEST instruction
2019-11-28 12:08:31 +00:00
caheckman
d322303f59
Basic parity flag implementation for x86
2019-11-27 13:39:30 -05:00
Ryan Kurtz
8e4b143f58
Merge remote-tracking branch 'origin/GT-3339_x64_vector_ops'
2019-11-27 10:35:41 -05:00
James
ac3361954f
GT-3339 code review changes
2019-11-26 14:01:34 -05:00
ghidra1
9a470a9dc7
Merge remote-tracking branch 'origin/patch'
2019-11-22 16:50:54 -05:00
ghidra1
4fc507f711
GT-3349 Corrected ELF relocation fixups for R_MIPS_REL32,
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R_X86_64_RELATIVE and R_X86_64_RELATIVE64
2019-11-22 16:49:24 -05:00
James
09745ce672
GT-3339 added pcode for x64 vector ops
2019-11-21 15:47:12 -05:00
caheckman
53e4a67fa2
Bug fix in ADDPS
2019-11-19 11:38:53 -05:00
caheckman
57c081eeda
psllq, psubq
2019-11-16 12:53:05 -05:00
caheckman
a1623af6a0
pmulw, pslld, psubd
2019-11-16 12:36:36 -05:00
caheckman
965afc8829
Replace specialized AVX constructors with bitrange operator
2019-11-16 11:47:25 -05:00
caheckman
64d15b3ea0
Use bitrange operator instead of special constructors when accessing
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vector register lanes
2019-11-16 10:28:09 -05:00
ghidorahrex
2ab04ae86d
GT-3256: x86 corrected disassembly of x87 escape opcodes
2019-11-13 08:07:37 -05:00
ghidorahrex
6b81682551
GT-3253: Corrected register definitions for the x86 rdrand instruction
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(fixes #1169 ).
2019-11-01 09:50:52 -04:00
Toshi Piazza
1a007daaba
Adds rex.W prefix encoding of J^cc on x86
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Previously ghidra could not parse the following bytes: 48 0f 85 05 00 00 00 (jne 0xc); note the 48 rex.W prefix which appears to be a no-op.
2019-10-20 12:46:24 -07:00
Ryan Kurtz
d632b57ddd
Merge remote-tracking branch 'origin/GT-3168_emteere' into Ghidra_9.1
2019-09-19 15:10:04 -04:00
Ryan Kurtz
3e7d94862e
Merge remote-tracking branch 'origin/GT-3039_ghidorahrex_x86_disassembly_error_on_movbe' into Ghidra_9.1
2019-09-19 12:14:29 -04:00
emteere
7a00eed58f
GT-3168_emteere Adding missed FMA.sinc file
2019-09-19 09:35:48 -04:00
emteere
7f74da36e2
GT-3168_emteere Adding missing FMA, F16C, and misc AVX instructions
2019-09-19 09:06:05 -04:00
Ryan Kurtz
23d1e9ad22
Merge remote-tracking branch 'origin/GT-3090_16bit_analysis'
2019-09-06 13:24:34 -04:00
caheckman
11d7420af5
allow segmentop tag in cspec, update segmentop XML
2019-08-29 16:28:03 -04:00
caheckman
4c3289f09f
Use InjectPayload for segment ops
2019-08-29 14:17:02 -04:00
Ryan Kurtz
62b60ccb34
Merge remote-tracking branch 'origin/GT-3113'
2019-08-28 08:08:21 -04:00
James
8302bef89a
GT-3113 x86/64 linux syscalls
2019-08-27 17:06:20 -04:00
emteere
587ebd6c04
GT-3117 relax rmod for debug register move
2019-08-27 14:50:47 -04:00
caheckman
06de0d46a0
Merge branch 'GT-3090_NearPointerResolve' into GT-3090_16bit_analysis
2019-08-27 14:40:16 -04:00
caheckman
faf93508e6
More x86 changes to accomodate protected mode
2019-08-27 14:35:48 -04:00
caheckman
017537be35
protected mode bit
2019-08-27 14:35:46 -04:00
