mirror of
https://github.com/NationalSecurityAgency/ghidra.git
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349ef0fad2
Imposed default Thumb context setting for PE and MSCoff ARM32 imports with addition of v8T ARM variant. Corrected ARM pattern alignment issues. Corrected DBViewer long value rendering.
131 lines
4.3 KiB
XML
131 lines
4.3 KiB
XML
<?xml version="1.0" encoding="UTF-8"?>
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<compiler_spec>
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<!-- Copied from ARM.cspec and modified... See: https://docs.microsoft.com/en-us/cpp/build/overview-of-arm-abi-conventions?view=vs-2019 -->
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<data_organization>
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<absolute_max_alignment value="0" />
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<machine_alignment value="2" />
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<default_alignment value="1" />
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<default_pointer_alignment value="4" />
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<pointer_size value="4" />
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<wchar_size value="2" />
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<short_size value="2" />
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<integer_size value="4" />
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<long_size value="4" />
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<long_long_size value="8" />
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<float_size value="4" />
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<double_size value="8" />
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<long_double_size value="8" />
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<size_alignment_map>
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<entry size="1" alignment="1" />
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<entry size="2" alignment="2" />
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<entry size="4" alignment="4" />
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<entry size="8" alignment="8" />
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</size_alignment_map>
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<bitfield_packing>
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<use_MS_convention value="true"/>
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</bitfield_packing>
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</data_organization>
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<global>
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<range space="ram"/>
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</global>
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<stackpointer register="sp" space="ram"/>
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<funcptr align="2"/> <!-- Function pointers are word aligned and leastsig bit may encode otherstuff -->
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<default_proto>
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<prototype name="__stdcall" extrapop="0" stackshift="0">
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<input>
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<!-- we cannot accurately model the allocation scheme when parameters are larger than 4 bytes -->
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<pentry minsize="1" maxsize="4" metatype="float">
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<register name="s0"/>
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</pentry>
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<pentry minsize="1" maxsize="4" metatype="float">
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<register name="s1"/>
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</pentry>
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<pentry minsize="1" maxsize="4" metatype="float">
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<register name="s2"/>
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</pentry>
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<pentry minsize="1" maxsize="4" metatype="float">
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<register name="s3"/>
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</pentry>
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<pentry minsize="1" maxsize="4" metatype="float">
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<register name="s4"/>
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</pentry>
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<pentry minsize="1" maxsize="4" metatype="float">
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<register name="s5"/>
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</pentry>
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<pentry minsize="1" maxsize="4" metatype="float">
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<register name="s6"/>
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</pentry>
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<pentry minsize="1" maxsize="4" metatype="float">
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<register name="s7"/>
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</pentry>
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<pentry minsize="1" maxsize="4" extension="inttype">
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<register name="r0"/>
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</pentry>
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<pentry minsize="1" maxsize="4" extension="inttype">
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<register name="r1"/>
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</pentry>
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<pentry minsize="1" maxsize="4" extension="inttype">
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<register name="r2"/>
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</pentry>
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<pentry minsize="1" maxsize="4" extension="inttype">
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<register name="r3"/>
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</pentry>
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<pentry minsize="1" maxsize="500" align="4">
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<addr offset="0" space="stack"/>
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</pentry>
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</input>
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<output>
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<pentry minsize="1" maxsize="16" metatype="float">
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<register name="q0"/>
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</pentry>
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<pentry minsize="1" maxsize="4" extension="inttype">
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<register name="r0"/>
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</pentry>
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<pentry minsize="5" maxsize="8">
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<addr space="join" piece1="r0" piece2="r1"/>
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</pentry>
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</output>
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<unaffected>
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<register name="r4"/>
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<register name="r5"/>
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<register name="r6"/>
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<register name="r7"/>
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<register name="r8"/>
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<register name="r9"/>
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<register name="r10"/>
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<register name="r11"/>
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<register name="q4"/>
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<register name="q5"/>
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<register name="q6"/>
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<register name="q7"/>
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<register name="sp"/>
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<register name="lr"/>
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<register name="pc"/>
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</unaffected>
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<killedbycall>
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<register name="r0"/>
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<register name="r1"/>
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<register name="r2"/>
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<register name="r3"/>
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<register name="r12"/>
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<register name="q0"/>
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<register name="q1"/>
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<register name="q2"/>
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<register name="q3"/>
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<register name="q8"/>
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<register name="q9"/>
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<register name="q10"/>
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<register name="q11"/>
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<register name="q12"/>
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<register name="q13"/>
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<register name="q14"/>
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<register name="q15"/>
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</killedbycall>
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</prototype>
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</default_proto>
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</compiler_spec>
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