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Merge remote-tracking branch 'origin/GT-3095_ghidorahrex_PR-871_andyhhp_x86_sahf_lahf_64bit'

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Ryan Kurtz 2019-08-20 14:29:40 -04:00
commit 0e5d55d74d
1 changed files with 4 additions and 2 deletions
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6
Ghidra/Processors/x86/data/languages/ia.sinc
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@ -3437,7 +3437,8 @@ enterFrames: low5 is low5 { tmp:1 = low5; export tmp; }
:JMPF Mem is vexMode=0 & opsize=2 & byte=0xff; Mem & reg_opcode=5 ... { target:$(SIZE) = *:8 Mem; goto [target]; } :JMPF Mem is vexMode=0 & opsize=2 & byte=0xff; Mem & reg_opcode=5 ... { target:$(SIZE) = *:8 Mem; goto [target]; }
@endif @endif
:LAHF is vexMode=0 & byte=0x9f & bit64=0 { AH=(SF<<7)|(ZF<<6)|(AF<<4)|(PF<<2)|2|CF; } # Initially disallowed in 64bit mode, but later reintroduced
:LAHF is vexMode=0 & byte=0x9f { AH=(SF<<7)|(ZF<<6)|(AF<<4)|(PF<<2)|2|CF; }
:LAR Reg16,rm16 is vexMode=0 & opsize=0 & byte=0xf; byte=0x2; rm16 & Reg16 ... { Reg16 = rm16 & 0xff00; ZF=1; } :LAR Reg16,rm16 is vexMode=0 & opsize=0 & byte=0xf; byte=0x2; rm16 & Reg16 ... { Reg16 = rm16 & 0xff00; ZF=1; }
:LAR Reg32,rm32 is vexMode=0 & opsize=1 & byte=0xf; byte=0x2; rm32 & Reg32 ... & check_Reg32_dest ... { Reg32 = rm32 & 0xffff00; build check_Reg32_dest; ZF=1; } :LAR Reg32,rm32 is vexMode=0 & opsize=1 & byte=0xf; byte=0x2; rm32 & Reg32 ... & check_Reg32_dest ... { Reg32 = rm32 & 0xffff00; build check_Reg32_dest; ZF=1; }
@ -4089,7 +4090,8 @@ define pcodeop rdtsc;
define pcodeop smm_restore_state; define pcodeop smm_restore_state;
:RSM is vexMode=0 & byte=0xf; byte=0xaa { tmp:4 = smm_restore_state(); return [tmp]; } :RSM is vexMode=0 & byte=0xf; byte=0xaa { tmp:4 = smm_restore_state(); return [tmp]; }
:SAHF is vexMode=0 & byte=0x9e & bit64=0 { SF = (AH & 0x80) != 0; # Initially disallowed in 64bit mode, but later reintroduced
:SAHF is vexMode=0 & byte=0x9e { SF = (AH & 0x80) != 0;
ZF = (AH & 0x40) != 0; ZF = (AH & 0x40) != 0;
AF = (AH & 0x10) != 0; AF = (AH & 0x10) != 0;
PF = (AH & 0x04) != 0; PF = (AH & 0x04) != 0;