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Code Issues Releases Wiki Activity

allow segmentop tag in cspec, update segmentop XML

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This commit is contained in:
caheckman 2019-08-29 16:28:03 -04:00
parent 4c3289f09f
commit 11d7420af5
8 changed files with 34 additions and 149 deletions
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29
Ghidra/Framework/SoftwareModeling/src/main/java/ghidra/app/plugin/processors/sleigh/SleighLanguage.java
View file

@ -101,6 +101,13 @@ public class SleighLanguage implements Language {
initialize(description); initialize(description);
} }
private void addAdditionInject(InjectPayloadSleigh payload) {
if (additionalInject == null) {
additionalInject = new ArrayList<>();
}
additionalInject.add(payload);
}
private void initialize(SleighLanguageDescription langDescription) private void initialize(SleighLanguageDescription langDescription)
throws SAXException, IOException, UnknownInstructionException { throws SAXException, IOException, UnknownInstructionException {
this.defaultSymbols = new ArrayList<>(); this.defaultSymbols = new ArrayList<>();
@ -591,35 +598,32 @@ public class SleighLanguage implements Language {
} }
InjectPayloadSleigh payload = InjectPayloadSleigh payload =
new InjectPayloadSleigh(subName, InjectPayload.EXECUTABLEPCODE_TYPE, source); new InjectPayloadSleigh(subName, InjectPayload.EXECUTABLEPCODE_TYPE, source);
if (additionalInject == null) {
additionalInject = new ArrayList<>();
}
payload.restoreXml(parser); payload.restoreXml(parser);
additionalInject.add(payload); addAdditionInject(payload);
} }
} }
private void parseSegmentOp(XmlElement el, XmlPullParser parser) { public InjectPayloadSleigh parseSegmentOp(XmlElement el, XmlPullParser parser) {
String name = el.getAttribute("userop"); String name = el.getAttribute("userop");
if (name == null) { if (name == null) {
name = "segment"; name = "segment";
} }
name = name + "_pcode"; name = name + "_pcode";
String source = "pspec: " + getLanguageID().getIdAsString(); String source = "pspec: " + getLanguageID().getIdAsString();
InjectPayloadSleigh payload = null;
if (parser.peek().isStart()) { if (parser.peek().isStart()) {
if (parser.peek().getName().equals("pcode")) { if (parser.peek().getName().equals("pcode")) {
InjectPayloadSleigh payload = payload = new InjectPayloadSleigh(name, InjectPayload.EXECUTABLEPCODE_TYPE, source);
new InjectPayloadSleigh(name, InjectPayload.EXECUTABLEPCODE_TYPE, source);
if (additionalInject == null) {
additionalInject = new ArrayList<>();
}
payload.restoreXml(parser); payload.restoreXml(parser);
additionalInject.add(payload);
} }
} }
while (parser.peek().isStart()) { while (parser.peek().isStart()) {
parser.discardSubTree(); parser.discardSubTree();
} }
if (payload == null) {
throw new SleighException("Missing <pcode> child for <segmentop> tag");
}
return payload;
} }
private void read(XmlPullParser parser) { private void read(XmlPullParser parser) {
@ -798,7 +802,8 @@ public class SleighLanguage implements Language {
} }
} }
else if (element.getName().equals("segmentop")) { else if (element.getName().equals("segmentop")) {
parseSegmentOp(element, parser); InjectPayloadSleigh payload = parseSegmentOp(element, parser);
addAdditionInject(payload);
} }
// get rid of the end tag of whatever we started with at the top of the while // get rid of the end tag of whatever we started with at the top of the while
parser.end(element); parser.end(element);

6
Ghidra/Framework/SoftwareModeling/src/main/java/ghidra/program/model/lang/BasicCompilerSpec.java
View file

@ -482,6 +482,12 @@ public class BasicCompilerSpec implements CompilerSpec {
evalCurrentPrototype = parser.start().getAttribute("name"); evalCurrentPrototype = parser.start().getAttribute("name");
parser.end(); parser.end();
} }
else if (name.equals("segmentop")) {
XmlElement el = parser.start();
InjectPayloadSleigh payload = language.parseSegmentOp(el, parser);
parser.end();
pcodeInject.registerInject(payload);
}
else { else {
XmlElement el = parser.start(); XmlElement el = parser.start();
parser.discardSubTree(el); parser.discardSubTree(el);

13
Ghidra/Processors/Z80/data/languages/z80.cspec
View file

@ -9,10 +9,15 @@
<range space="io"/> <range space="io"/>
</global> </global>
<stackpointer register="SP" space="ram"/> <stackpointer register="SP" space="ram"/>
<segmentop space="ram" userop="segment" baseinsize="2" innerinsize="2" farpointer="yes"> <segmentop space="ram" userop="segment" farpointer="yes">
<baseop code="INT_ZEXT"/> <pcode>
<baseop code="INT_LEFT" value="12"/> <input name="inner" size="2"/>
<innerop code="INT_ZEXT"/> <input name="base" size="2"/>
<output name="res" size="2"/>
<body><![CDATA[
res = (base << 12) + inner;
]]></body>
</pcode>
<constresolve> <constresolve>
<register name="rBBR"/> <register name="rBBR"/>
</constresolve> </constresolve>

2
Ghidra/Processors/x86/certification.manifest
View file

@ -35,8 +35,6 @@ data/languages/x86-64-win.cspec||GHIDRA||||END|
data/languages/x86-64.dwarf||GHIDRA||||END| data/languages/x86-64.dwarf||GHIDRA||||END|
data/languages/x86-64.pspec||GHIDRA||||END| data/languages/x86-64.pspec||GHIDRA||||END|
data/languages/x86-64.slaspec||GHIDRA||||END| data/languages/x86-64.slaspec||GHIDRA||||END|
data/languages/x86-smm.cspec||GHIDRA||||END|
data/languages/x86-smm.pspec||GHIDRA||||END|
data/languages/x86.dwarf||GHIDRA||||END| data/languages/x86.dwarf||GHIDRA||||END|
data/languages/x86.ldefs||GHIDRA||||END| data/languages/x86.ldefs||GHIDRA||||END|
data/languages/x86.opinion||GHIDRA||||END| data/languages/x86.opinion||GHIDRA||||END|

108
Ghidra/Processors/x86/data/languages/x86-smm.cspec
View file

@ -1,108 +0,0 @@
<?xml version="1.0" encoding="UTF-8"?>
<compiler_spec>
<global>
<range space="ram"/>
</global>
<stackpointer register="SP" space="ram"/>
<segmentop space="ram"
userop="segment"
baseinsize="2"
innerinsize="2"
farpointer="yes"
force="false">
<baseop code="INT_ZEXT"/>
<baseop code="INT_LEFT" value="16"/>
<innerop code="INT_ZEXT"/>
</segmentop>
<default_proto>
<prototype name="__stdcall16near" extrapop="unknown" stackshift="2">
<input>
<pentry minsize="1" maxsize="500" align="2">
<addr offset="2" space="stack"/>
</pentry>
</input>
<output>
<pentry minsize="1" maxsize="2">
<register name="AX"/>
</pentry>
</output>
<unaffected>
<register name="SP"/>
<register name="BP"/>
<register name="SI"/>
<register name="DI"/>
<register name="DS"/>
<register name="CS"/>
<register name="ES"/>
<register name="SS"/>
</unaffected>
</prototype>
</default_proto>
<prototype name="__cdecl16near" extrapop="2" stackshift="2">
<input>
<pentry minsize="1" maxsize="500" align="2">
<addr offset="2" space="stack"/>
</pentry>
</input>
<output>
<pentry minsize="1" maxsize="2">
<register name="AX"/>
</pentry>
</output>
<unaffected>
<register name="SP"/>
<register name="BP"/>
<register name="SI"/>
<register name="DI"/>
<register name="DS"/>
<register name="CS"/>
<register name="ES"/>
<register name="SS"/>
</unaffected>
</prototype>
<prototype name="__stdcall16far" extrapop="unknown" stackshift="2">
<input>
<pentry minsize="1" maxsize="500" align="2">
<addr offset="4" space="stack"/>
</pentry>
</input>
<output>
<pentry minsize="1" maxsize="2">
<register name="AX"/>
</pentry>
</output>
<unaffected>
<register name="SP"/>
<register name="BP"/>
<register name="SI"/>
<register name="DI"/>
<register name="DS"/>
<register name="CS"/>
<register name="ES"/>
<register name="SS"/>
</unaffected>
</prototype>
<prototype name="__cdecl16far" extrapop="4" stackshift="2">
<input>
<pentry minsize="1" maxsize="500" align="2">
<addr offset="4" space="stack"/>
</pentry>
</input>
<output>
<pentry minsize="1" maxsize="2">
<register name="AX"/>
</pentry>
</output>
<unaffected>
<register name="SP"/>
<register name="BP"/>
<register name="SI"/>
<register name="DI"/>
<register name="DS"/>
<register name="CS"/>
<register name="ES"/>
<register name="SS"/>
</unaffected>
</prototype>
</compiler_spec>

13
Ghidra/Processors/x86/data/languages/x86-smm.pspec
View file

@ -1,13 +0,0 @@
<?xml version="1.0" encoding="UTF-8"?>
<processor_spec>
<properties>
<property key="useOperandReferenceAnalyzerSwitchTables" value="true"/>
</properties>
<context_data>
<context_set space="ram">
<set name="addrsize" val="0"/>
<set name="opsize" val="0"/>
</context_set>
</context_data>
</processor_spec>

4
Ghidra/Processors/x86/data/languages/x86.ldefs
View file

@ -34,11 +34,11 @@
variant="System Management Mode" variant="System Management Mode"
version="2.8" version="2.8"
slafile="x86.sla" slafile="x86.sla"
processorspec="x86-smm.pspec" processorspec="x86-16.pspec"
manualindexfile="../manuals/x86.idx" manualindexfile="../manuals/x86.idx"
id="x86:LE:32:System Management Mode"> id="x86:LE:32:System Management Mode">
<description>Intel/AMD 32-bit x86 System Management Mode</description> <description>Intel/AMD 32-bit x86 System Management Mode</description>
<compiler name="default" spec="x86-smm.cspec" id="default"/> <compiler name="default" spec="x86-16.cspec" id="default"/>
<external_name tool="DWARF.register.mapping.file" name="x86.dwarf"/> <external_name tool="DWARF.register.mapping.file" name="x86.dwarf"/>
</language> </language>
<language processor="x86" <language processor="x86"

8
GhidraBuild/Skeleton/data/languages/skel.cspec
View file

@ -11,14 +11,6 @@
<range space="io"/> <range space="io"/>
</global> </global>
<stackpointer register="SP" space="ram"/> <stackpointer register="SP" space="ram"/>
<segmentop space="ram" userop="segment" baseinsize="2" innerinsize="2" farpointer="yes">
<baseop code="INT_ZEXT"/>
<baseop code="INT_LEFT" value="12"/>
<innerop code="INT_ZEXT"/>
<constresolve>
<register name="rBBR"/>
</constresolve>
</segmentop>
<default_proto> <default_proto>
<prototype name="__asmA" extrapop="2" stackshift="2" strategy="register"> <prototype name="__asmA" extrapop="2" stackshift="2" strategy="register">
<input> <input>